US4375601A
Expired / Lapsed
US
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Signal stability recognition
Assignee: Beckman Coulter Inc
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Filing: 1980-07-07
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Granted: 1983-03-01
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Expires: 2000-07-07
Abstract
Abstract Apparatus for indicating when an analog or digital input signal remains sufficiently stable for a predetermined length of time. The apparatus continuously monitors the input signal instead of sampling it only at discrete points in time. The apparatus includes a memory which stores the value of the input signal at the time of the most recent occurrence of a reset signal, a comparator which produces the reset signal whenever the input signal differs from the memory signal by an amount greater than that allowed by a predetermined comparison criterion, and a timer for indicating that the input signal is stable when the reset signal has not been produced for a time exceeding the predetermined length of time.
Inventors
- 👤 James G. Van Vliet
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 17:03
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; G; G01; G01R; G01R19/00; G01R19/165; G01R19/16566; G01R19/16585; H03K5/19
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
130 words
Apparatus for indicating when an input signal remains sufficiently stable for a predetermined length of time, comprising: memory means, responsive to the input signal and a reset signal, for producing a memory signal equal to the value of the input signal at the time of the most recent occurrence of the reset signal; comparator means responsive to the memory signal and to the input signal for producing the reset signal when the input signal differs from the memory signal by an amount greater than that allowed by a predetermined comparison criterion; and resettable timing means responsive to the reset signal for indicating that the input signal is stable by generating a signal only when the reset signal has not been produced for a time exceeding the predetermined length of time.
Claim 2
Dependent Claim
130 words
Apparatus for indicating when an input signal remains sufficiently stable for a predetermined length of time, comprising: memory means, responsive to the input signal and a reset signal, for producing a memory signal equal to the value of the input signal at the time of the most recent occurrence of the reset signal; comparator means responsive to the memory signal and to the input signal for producing the reset signal when the input signal differs from the memory signal by an amount greater than that allowed by a predetermined comparison criterion; and resettable timing means responsive to the reset signal for indicating that the input signal is stable by generating a signal only when the reset signal has not been produced for a time exceeding the predetermined length of time.
Claim 3
Dependent Claim
25 words
Apparatus according to claim 1, wherein the input signal and the memory signal are each analog signals; and the memory means comprises a sample-and-hold circuit.
Claim 4
Dependent Claim
54 words
Apparatus according to claim 1, wherein the input signal and the memory signal are each digital signals; the memory means includes a storage register; and the comparator means produces the reset signal unless the input signal is equal to the memory signal or is within a predetermined number of counts of the memory signal.
Claim 5
Dependent Claim
138 words
Apparatus for indicating when a digital input signal remains sufficiently stable for a predetermined length of time, comprising: memory means, responsive to the digital input signal and to a reset signal, for producing a digital signal equal to the value of the digital input signal at the time of the reception of the reset signal by the memory means; comparator means including means for determining when the difference between the digital input signal and the digital memory signal exceeds a predetermined number of binary counts, and means for generating the reset signal when the difference exceeds the predetermined number of binary counts; and resettable timing means for generating a signal only when the reset signal has not been produced for a time exceeding the predetermined length of time to thereby indicate that the input signal is sufficiently stable.
Claim 6
Dependent Claim
138 words
Apparatus for indicating when a digital input signal remains sufficiently stable for a predetermined length of time, comprising: memory means, responsive to the digital input signal and to a reset signal, for producing a digital signal equal to the value of the digital input signal at the time of the reception of the reset signal by the memory means; comparator means including means for determining when the difference between the digital input signal and the digital memory signal exceeds a predetermined number of binary counts, and means for generating the reset signal when the difference exceeds the predetermined number of binary counts; and resettable timing means for generating a signal only when the reset signal has not been produced for a time exceeding the predetermined length of time to thereby indicate that the input signal is sufficiently stable.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-02-28 | 1986-08-30 | 1987-03-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-02-28 | 1990-08-30 | 1991-03-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-02-28 | 1994-08-30 | 1995-03-01 | $7700.00 | Window Closed / Lapsed |