US4388648A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Frequency selective DC coupled video signal control system insensitive to video signal DC components
Assignee: RCA Licensing Corp
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Filing: 1981-10-09
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Granted: 1983-06-14
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Expires: 2001-10-09
Abstract
Abstract A DC coupled system for automatically controlling the high frequency peaking content of a video signal is disclosed. The system includes a DC coupled control path comprising a peak detector for developing a control voltage representative of the high frequency content of the video signal exclusive of video signal DC components. The detector is preceded in the control path by a frequency selective network comprising an amplifier and a filter for shaping the frequency response of the control path such that high frequency video signal components exclusive of DC video signal components are passed to the peak detector. The frequency selective network comprises the cascode combination of a video signal amplifier transistor and a current source transistor which provides quiescent operating currents for the amplifier transistor. The filter is coupled to the junction of the amplifier and current source transistors, and includes a DC blocking network coupled between the junction and a point of reference potential.
Inventors
- 👤 Leopold A. Harwood
- 👤 II Robert L. Shanley
- 👤 James Hettiger
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 10:58
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/14; H04N5/20; H04N5/205; H03; H03H; H03H11/00; H03H11/02; H03H11/04; H03H11/12; H03H11/1213
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
184 words
A frequency selective video signal processor responsive to video signals including high frequency and DC components for developing an output video signal encompassing a given frequency range of video signal high frequency components to the substantial exclusion of video signal DC components, comprising an amplifier comprising an amplifier transistor and a current source transistor with main current conduction paths coupled in series, said amplifier transistor having a signal input responsive to said video signals including said DC component, a low impedance bias input, and an output coupled to a load impedance, and said current source transistor being coupled to said bias input of said amplifier transistor for providing quiescent operating current for said amplifier transistor; and a filter coupled between said low impedance bias input of said amplifier means and a point of reference potential, said filter exhibiting a first impedance at DC such that said amplifier transistor exhibits a first gain at DC, and a second significantly smaller impedance at a frequency within said given frequency range such that said amplifier transistor then exhibits a second gain significantly greater than said first gain.
Claim 2
Dependent Claim
184 words
A frequency selective video signal processor responsive to video signals including high frequency and DC components for developing an output video signal encompassing a given frequency range of video signal high frequency components to the substantial exclusion of video signal DC components, comprising an amplifier comprising an amplifier transistor and a current source transistor with main current conduction paths coupled in series, said amplifier transistor having a signal input responsive to said video signals including said DC component, a low impedance bias input, and an output coupled to a load impedance, and said current source transistor being coupled to said bias input of said amplifier transistor for providing quiescent operating current for said amplifier transistor; and a filter coupled between said low impedance bias input of said amplifier means and a point of reference potential, said filter exhibiting a first impedance at DC such that said amplifier transistor exhibits a first gain at DC, and a second significantly smaller impedance at a frequency within said given frequency range such that said amplifier transistor then exhibits a second gain significantly greater than said first gain.
Claim 3
Dependent Claim
21 words
Apparatus according to claim 1 wherein said current source transistor provides a substantially constant quiescent operating current to said amplifier transistor.
Claim 4
Dependent Claim
99 words
Apparatus according to claim 1, wherein said amplifier transistor has a base electrode for receiving said video signal including said DC component, a collector electrode coupled to said load impedance, and an emitter electrode; and said current source transistor has a base electrode coupled to a bias voltage, an emitter electrode coupled to a reference potential, and a collector electrode coupled to said emitter electrode of said amplifier transistor for supplying a substantially constant quiescent operating current to said amplifier transistor; and wherein said filter comprises a series resonant filter coupled to said emitter electrode of said amplifier transistor.
Claim 5
Dependent Claim
33 words
Apparatus according to claim 3, wherein said filter comprises the series combination of an inductor and a capacitor coupled between a point of reference potential and said emitter electrode of said amplifier transistor.
Claim 6
Dependent Claim
192 words
Apparatus for automatically controlling the high frequency peaking content of a video signal including high frequency and DC components, said apparatus comprising: peaking means responsive to said video signal for generating a peaking component; means for combining said video signal with said peaking component to produce a peaked video signal; a DC coupled control path with an input responsive to said video signal and an output coupled to said peaking means, comprising an amplifier with an input for receiving said video signal including high frequency and DC components, and an output; a detector coupled to said amplifier output for producing a control voltage representative of the magnitude of output signals from said amplifier; and means for coupling said control voltage to said peaking means for controlling the magnitude of said peaking component and thereby the peaking content of said peaked video signal; and filter means coupled to said amplifier in said DC coupled control path for shaping the frequency response of said amplifier so that output signals from said amplifier as coupled to said detector comprise video signal high frequency components within a given range of frequencies substantially exclusive of DC components.
Claim 7
Dependent Claim
192 words
Apparatus for automatically controlling the high frequency peaking content of a video signal including high frequency and DC components, said apparatus comprising: peaking means responsive to said video signal for generating a peaking component; means for combining said video signal with said peaking component to produce a peaked video signal; a DC coupled control path with an input responsive to said video signal and an output coupled to said peaking means, comprising an amplifier with an input for receiving said video signal including high frequency and DC components, and an output; a detector coupled to said amplifier output for producing a control voltage representative of the magnitude of output signals from said amplifier; and means for coupling said control voltage to said peaking means for controlling the magnitude of said peaking component and thereby the peaking content of said peaked video signal; and filter means coupled to said amplifier in said DC coupled control path for shaping the frequency response of said amplifier so that output signals from said amplifier as coupled to said detector comprise video signal high frequency components within a given range of frequencies substantially exclusive of DC components.
Claim 8
Dependent Claim
21 words
Apparatus according to claim 5, wherein said amplifier receives said peaked video signal; and said detector corresponds to a peak detector.
Claim 9
Dependent Claim
145 words
Apparatus according to claim 5, wherein said amplifier comprises a cascode arrangement of an amplifier transistor and a current source transistor, said amplifier transistor having a signal input responsive to said video signal including high frequency and DC components, a low impedance bias input, and an output coupled to a load impedance, said current source transistor being coupled to said bias input of said amplifier transistor for providing quiescent operating current for said amplifier transistor; and said filter is coupled between said low impedance bias input of said amplifier transistor and a point of reference potential, said filter exhibiting a first impedance at DC such that said amplifier transistor exhibits a first gain at DC, and a significantly smaller second impedance at a frequency within said given frequency range such that said amplifier transistor then exhibits a second gain significantly greater than said first gain.
Claim 10
Dependent Claim
17 words
Apparatus according to claim 7, wherein said current source transistor provides a substantially constant quiescent operating current.
Claim 11
Dependent Claim
103 words
Apparatus according to claim 5, wherein said amplifier transistor has a base electrode for receiving said video signal including said high frequency and DC components, a collector electrode coupled to said load impedance, and an emitter electrode; and said current source transistor has a base electrode coupled to a bias voltage, an emitter electrode coupled to a reference potential, and a collector electrode coupled to said emitter electrode of said amplifier transistor for supplying a substantially constant quiescent operating current to said amplifier transistor; and wherein said filter means comprises a series resonant filter coupled to said emitter electrode of said amplifier transistor.
Claim 12
Dependent Claim
34 words
Apparatus according to claim 9, wherein said filter means comprises the series combination of an inductor and a capacitor coupled between a point of reference potential and said emitter electrode of said amplifier transistor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1986-06-13 | 1986-12-13 | 1987-06-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1990-06-13 | 1990-12-13 | 1991-06-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1994-06-13 | 1994-12-13 | 1995-06-14 | $7700.00 | Window Closed / Lapsed |