Speech synthesizer with smooth linear interpolation

Claim 2

In a speech synthesizer including an all-pole, multi-stage lattice filter for reconstructing a plurality N of speech samples from each set of correlation coefficients and accompanying excitation signal applied thereto, smooth interpolation apparatus comprising: (a) new parameter storage means for receiving and storing each new set of correlation coefficients; (b) old parameter storage means connected to said new parameter storage means for receiving each of the sets of correlation coefficients subsequent to the reconstruction of the N speech samples therefrom; and (c) circuit means connected to said new and old parameter storage means for determining the difference between each new and old correlation coefficient in the new and old sets, separating the difference into N steps and providing a correlation coefficient which changes in the N steps from the old correlation coefficient to the new correlation coefficient.

Claim 3

The smooth interpolation apparatus as claimed in claim 1 wherein the new and old parameter storage means include shift registers.

Claim 4

The smooth interpolation apparatus as claimed in claim 1 wherein the speech synthesizer is formed as an integrated circuit on a single semiconductor chip.

Claim 5

The smooth interpolation apparatus as claimed in claim 1 wherein the circuit means performs the required functions in accordance with the equation K.sub.T =K.sub.I old+(K.sub.I new-K.sub.I old)n/N where: K T is the changing correlation coefficient, K I old is the old correlation coefficient, K I new is the new correlation coefficient, N is the number of samples to be reconstructed for each set of correlation coefficients, and n is the particular sample of the N samples being reconstructed.

Claim 6

A speech synthesizer formed as an integrated circuit on a single semiconductor chip comprising: (a) excitation input means connected to receive external signals for providing excitation signals; (b) correlation coefficient input means; (c) new parameter storage means connected to said correlation coefficient input means for receiving and storing each new set of correlation coefficients upon being operatively sequenced; (d) old parameter storage means connected to said new parameter storage means for receiving each of the sets of correlation coefficients subsequent to reconstruction of N speech samples therefrom; (e) a data bus and a control bus coupled to said excitation input means, said correlation coefficient input means, said new and said old parameter storage means; (f) a multiplier coupled to said data and control buses; (g) an adder/subtractor coupled to said data and control buses; (h) a plurality of temporary storage units coupled to said data and control buses; and (i) sequencing circuitry coupled to said control bus for controlling each of said components in a predetermined sequence.

Claim 7

A speech synthesizer formed as an integrated circuit on a single semiconductor chip comprising: (a) excitation input means connected to receive external signals for providing excitation signals; (b) correlation coefficient input means; (c) new parameter storage means connected to said correlation coefficient input means for receiving and storing each new set of correlation coefficients upon being operatively sequenced; (d) old parameter storage means connected to said new parameter storage means for receiving each of the sets of correlation coefficients subsequent to reconstruction of N speech samples therefrom; (e) a data bus and a control bus coupled to said excitation input means, said correlation coefficient input means, said new and said old parameter storage means; (f) a multiplier coupled to said data and control buses; (g) an adder/subtractor coupled to said data and control buses; (h) a plurality of temporary storage units coupled to said data and control buses; and (i) sequencing circuitry coupled to said control bus for controlling each of said components in a predetermined sequence.

Claim 8

A speech synthesizer as claimed in claim 5 wherein the new and old storage means and the temporary storage units each include shift registers.

Claim 9

A speech synthesizer as claimed in claim 5 wherein the correlation coefficient input means includes a first-in first-out random access memory.

Claim 10

A speech synthesizer as claimed in claim 5 wherein the sequencing circuitry is programmable to synthesize speech in accordance with different methods including all-pole lattice filter, cascaded second order filter, direct form filter, and pole and zero filter.

Claim 11

In speech synthesis wherein a plurality N of speech samples are reconstructed from each set of correlation coefficients and accompanying excitation signal applied thereto, a method of smoothly interpolating the correlation coefficients comprising the steps of: (a) storing a first, or old, set of correlation coefficients; (b) receiving a second, or new, set of correlation coefficients; (c) determining the difference between the new and the old correlation coefficients; and (d) developing a new set of correlation coefficients which changes 1/Nth of the difference from the old to the new correlation coefficients for each of the N samples reconstructed.

Claim 12

In speech synthesis wherein a plurality N of speech samples are reconstructed from each set of correlation coefficients and accompanying excitation signal applied thereto, a method of smoothly interpolating the correlation coefficients comprising the steps of: (a) storing a first, or old, set of correlation coefficients; (b) receiving a second, or new, set of correlation coefficients; (c) determining the difference between the new and the old correlation coefficients; and (d) developing a new set of correlation coefficients which changes 1/Nth of the difference from the old to the new correlation coefficients for each of the N samples reconstructed.