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US4405978A Expired / Lapsed US ⏱️ 0.0 years remaining

Microprocessor based computer terminal

Assignee: Bull HN Information Systems Inc
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Filing: 1979-06-25
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Granted: 1983-09-20
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Expires: 1999-06-25
📄 Original PDF 🌐 Google Patents

Abstract

Abstract An apparatus for conducting input output operations with another data processing device in a flexible and low cost manner is comprised of a programmed microprocessor coupled to a keyboard, a parallel port, and a modem. The microprocessor is programmed to periodically scan the keyboard to determine what keys if any are depressed. It also scans the parallel port for incoming data and senses incoming data from the modem by sensing a start bit. Control characters from the keyboard can set options such that incoming data from an input can be simultaneously sent out from the modem and/or parallel port.

Inventors

  • 👤 Ronald E. Lange
  • 👤 Steve E. King

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 17:59
CPC Classifications
G; G09; G09G; G09G5/00; G09G5/22; G09G5/222

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 321 words
A computer terminal apparatus for sending data to and receiving data from another data processing device comprising: (a) a keyboard means for allowing entry of data and control signals by an operator; (b) a port means for interfacing with said other data processing device so that data may be received from and sent to said other data processing device; (c) logic means selectively coupled to said keyboard means and said port means, said logic means including means for scanning said keyboard means, means for receiving and encoding data and control signals therefrom, means for presenting data received by said computer terminal at an output thereof, and means responsive to a predetermined control signal received from said keyboard for simultaneously transmitting data being received from said keyboard out through said port means to said other data processing device, said logic means including a microprocessor programmed to effect the stated functions, said microprocessor having an address bus, a data bus and a control output signal, and where said computer terminal apparatus includes a decoder means for decoding signals on a portion of said address bus, and where said keyboard is comprised of a matrix of switches, one side of each column of said switches being connected to a scan line connected to one of the outputs of said decoder means, and each row in said matrix of switches having one side connected to a sense line, said apparatus also including a tri-state buffer having a plurality of inputs connected respectively to said sense lines and an output connected to said data bus, said tri-state buffer having a control input for receiving said control output signal from said microprocessor for connecting said sense lines to said data bus when said microprocessor effects the scan of said keyboard means, said scanning being effected by said microprocessor by sequentially addressing each said scan line and reading the output of said tri-state buffer via said data bus.
Claim 2
Dependent Claim 321 words
A computer terminal apparatus for sending data to and receiving data from another data processing device comprising: (a) a keyboard means for allowing entry of data and control signals by an operator; (b) a port means for interfacing with said other data processing device so that data may be received from and sent to said other data processing device; (c) logic means selectively coupled to said keyboard means and said port means, said logic means including means for scanning said keyboard means, means for receiving and encoding data and control signals therefrom, means for presenting data received by said computer terminal at an output thereof, and means responsive to a predetermined control signal received from said keyboard for simultaneously transmitting data being received from said keyboard out through said port means to said other data processing device, said logic means including a microprocessor programmed to effect the stated functions, said microprocessor having an address bus, a data bus and a control output signal, and where said computer terminal apparatus includes a decoder means for decoding signals on a portion of said address bus, and where said keyboard is comprised of a matrix of switches, one side of each column of said switches being connected to a scan line connected to one of the outputs of said decoder means, and each row in said matrix of switches having one side connected to a sense line, said apparatus also including a tri-state buffer having a plurality of inputs connected respectively to said sense lines and an output connected to said data bus, said tri-state buffer having a control input for receiving said control output signal from said microprocessor for connecting said sense lines to said data bus when said microprocessor effects the scan of said keyboard means, said scanning being effected by said microprocessor by sequentially addressing each said scan line and reading the output of said tri-state buffer via said data bus.
Claim 3
Dependent Claim 387 words
A computer terminal apparatus for sending data to and receiving data from other data processing devices comprising: (a) a keyboard means for allowing entry of data and control signals by an operator; (b) a parallel port means for interfacing with said one of said other data processing devices so data may be received from and sent to said other data processing device in parallel format; (c) a modem means for interfacing with another of said other data processing devices over a distance via a communications network, said modem means for converting binary data from said computer terminal into signals suitable for transmission over said communications network, and for converting signals received from said other data processing device over said communications network into binary data for use by said computer terminal; (d) logic means selectively coupled to said keyboard means, said port means and said modem means, said logic means including means for scanning said keyboard means, means for receiving and encoding data and control signals therefrom, means for sensing when data is being received by said parallel port means or said modem means and means for presenting the data received from any of these inputs to said computer terminal at an output thereof, said logic means including a microprocessor programmed to effect the stated functions, said microprocessor having an address bus, a data bus and a control output signal, and where said computer terminal apparatus includes a decoder means for decoding signals on a portion of said address bus, and where said keyboard is comprised of a matrix of switches, one side of each column of said switches being connected to a scan line connected to one of the outputs of said decoder means, and each row in said matrix of switches having one side connected to a sense line, said apparatus also including a tri-state buffer having a plurality of inputs connected respectively to said sense lines and an output connected to said data bus, said tri-state buffer having a control input for receiving said control output signal from said microprocessor for connecting said sense lines to said data bus when said microprocessor effects the scan of said keyboard means, said scanning being effected by said microprocessor by sequentially addressing each said scan line and reading the output of said tri-state buffer via said data bus.
Claim 4
Dependent Claim 387 words
A computer terminal apparatus for sending data to and receiving data from other data processing devices comprising: (a) a keyboard means for allowing entry of data and control signals by an operator; (b) a parallel port means for interfacing with said one of said other data processing devices so data may be received from and sent to said other data processing device in parallel format; (c) a modem means for interfacing with another of said other data processing devices over a distance via a communications network, said modem means for converting binary data from said computer terminal into signals suitable for transmission over said communications network, and for converting signals received from said other data processing device over said communications network into binary data for use by said computer terminal; (d) logic means selectively coupled to said keyboard means, said port means and said modem means, said logic means including means for scanning said keyboard means, means for receiving and encoding data and control signals therefrom, means for sensing when data is being received by said parallel port means or said modem means and means for presenting the data received from any of these inputs to said computer terminal at an output thereof, said logic means including a microprocessor programmed to effect the stated functions, said microprocessor having an address bus, a data bus and a control output signal, and where said computer terminal apparatus includes a decoder means for decoding signals on a portion of said address bus, and where said keyboard is comprised of a matrix of switches, one side of each column of said switches being connected to a scan line connected to one of the outputs of said decoder means, and each row in said matrix of switches having one side connected to a sense line, said apparatus also including a tri-state buffer having a plurality of inputs connected respectively to said sense lines and an output connected to said data bus, said tri-state buffer having a control input for receiving said control output signal from said microprocessor for connecting said sense lines to said data bus when said microprocessor effects the scan of said keyboard means, said scanning being effected by said microprocessor by sequentially addressing each said scan line and reading the output of said tri-state buffer via said data bus.

References Cited (Backward Citations)

US3686637A Cited
US4014004A Cited
US4107784A Cited
US4186438A Cited
US4091448A Cited
US4222111A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1986-09-19 1987-03-21 1987-09-20 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1990-09-19 1991-03-21 1991-09-20 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1994-09-19 1995-03-21 1995-09-20 $7700.00 Window Closed / Lapsed

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