Complementary channel type MOS transistor exclusive OR/NOR logic gate circuit

Claim 1

A complementary transistor type logic gate circuit comprising: a first input terminal to which a first input signal is applied, a second input terminal to which a second input signal is applied, an output terminal, an inverter a first transistor and a second transistor of one conductivity type having gate, source and drain electrodes, a third transistor and a fourth transistor of a complementary conductivity type having gate, source and drain electrodes, said inverter being operatively connected to invert said first input signal and issue outputs to a source of said transistor and to a gate of said second transistor, said first input terminal being operatively connected to a source of said third transistor and a gate of said fourth transistor, said second input terminal being operatively connected to a gate of said first transistor, a source of said second transistor, a gate of said third transistor and a source of said fourth transistor, and all drains of said first, second, third and fourth transistors being connected in common to said output terminal.