US4438404A
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US
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Signal sampling system
Assignee: Tektronix Inc
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Filing: 1982-01-04
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Granted: 1984-03-20
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Expires: 2002-01-04
Abstract
Abstract A signal sampling system includes a combined digital and analog acquisition time base for accurately sampling and displaying an extremely short duration electrical event superimposed on a long time duration signal. The signal sampling system of the present invention is intended for use in stimulus-response situations, and both stimulus and response signals are synchronized with the clock of the digital portion of the time base. The system may be operated under microprocessor control, providing both flexibility and programmability, in turn permitting not only acquisition of waveforms that start and stop at arbitrary points with extreme precision, but signal averaging or smoothing as well.
Inventors
- 👤 Harald Philipp
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 06:26
CPC Classifications
G; G01; G01M; G01M11/00; G01M11/30; G01M11/31; G01M11/3109; G01M11/3145; G01R; G01R13/00; G01R13/20; G01R13/22; G01R13/34; G01R13/347; H; H03; H03K; H03K5/00; H03K5/13; H03K5/135
Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
95 words
A sampling time base, comprising: means for generating clock edges at a predetermined frequency; digital timing means for generating a digital delay signal substantially coincident with the Nth clock edge of a predetermined number N of clock edges, thereby establishing a digital timing interval from the first to the Nth clock edge; analog timing means responsive to said digital delay signal for initiating an analog timing signal substantially coincident with said Nth clock edge; and means for generating a sampling pulse at the end of a predetermined analog timing interval of said analog timing signal.
Claim 2
Dependent Claim
95 words
A sampling time base, comprising: means for generating clock edges at a predetermined frequency; digital timing means for generating a digital delay signal substantially coincident with the Nth clock edge of a predetermined number N of clock edges, thereby establishing a digital timing interval from the first to the Nth clock edge; analog timing means responsive to said digital delay signal for initiating an analog timing signal substantially coincident with said Nth clock edge; and means for generating a sampling pulse at the end of a predetermined analog timing interval of said analog timing signal.
Claim 3
Dependent Claim
28 words
A sampling time base in accordance with claim 1 wherein both said digital timing interval and said analog timing interval are programmable by a single logic control means.
Claim 4
Dependent Claim
17 words
A sampling time base in accordance with claim 2 wherein said logic control means comprises a microprocessor.
Claim 5
Dependent Claim
41 words
A sampling time base in accordance with claim 1 wherein said digital timing means comprises a programmable counter for counting said clock edges and producing said digital delay signal upon the last of a programmed number N of said clock edges.
Claim 6
Dependent Claim
21 words
A sampling time base in accordance with claim 4 wherein said programmable counter is activated upon receipt of a start signal.
Claim 7
Dependent Claim
27 words
A sampling time base in accordance with claim 1 wherein said analog timing means comprises linear ramp generating means initiated upon receipt of said digital delay signal.
Claim 8
Dependent Claim
56 words
A sampling time base in accordance with claim 6 wherein said sampling pulse generating means comprises comparison means receiving said linear ramp at one input thereof and a programmable voltage level at a second input thereof, said sampling pulse being generated by said comparison means when said linear ramp and said programmable voltage level are equal.
Claim 9
Dependent Claim
110 words
A signal sampling system, comprising: a precision time delay generator having combined digital timing means and analog timing means for generating sampling pulses after consecutive digital and analog timing intervals, said digital timing means generating delay signals at predetermined counts of a clock signal and said analog timing means interpolating between said predetermined counts to produce said sampling pulses after combined digital and analog time delay with high temporal resolution; means responsive to said sampling pulses for acquiring and storing samples of an input signal; and logic control means coupled to said precision delay generator for selecting time interval values for said digital timing means and said analog timing means.
Claim 10
Dependent Claim
110 words
A signal sampling system, comprising: a precision time delay generator having combined digital timing means and analog timing means for generating sampling pulses after consecutive digital and analog timing intervals, said digital timing means generating delay signals at predetermined counts of a clock signal and said analog timing means interpolating between said predetermined counts to produce said sampling pulses after combined digital and analog time delay with high temporal resolution; means responsive to said sampling pulses for acquiring and storing samples of an input signal; and logic control means coupled to said precision delay generator for selecting time interval values for said digital timing means and said analog timing means.
Claim 11
Dependent Claim
44 words
A signal sampling system in accordance with claim 8 wherein said digital timing means comprises a programmable counter for counting edges of said clock signal, and said analog timing means comprises ramp generating means and a programmable voltage level for producing said sampling pulses.
Claim 12
Dependent Claim
41 words
A signal sampling system in accordance with claim 9 wherein said digital timing means produces a stimulus signal to initiate said input signal, wherein the combined digital and analog time delay represents the time interval between stimulus and a succeeding response.
Claim 13
Dependent Claim
38 words
A signal sampling system in accordance with claim 8 wherein said means responsive to said sampling pulses for acquiring and storing samples of an input signal comprises in combination a sampler, an analog-to-digital converter, and a digital memory.
Claim 14
Dependent Claim
17 words
A signal sampling system in accordance with claim 8 wherein said logic control means comprises a microprocessor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-03-20 | 1987-09-19 | 1988-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-03-20 | 1991-09-19 | 1992-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-03-20 | 1995-09-19 | 1996-03-20 | $7700.00 | Window Closed / Lapsed |