US4456939A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Input protective circuit for semiconductor device
Assignee: Mitsubishi Electric Corp
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Filing: 1981-05-07
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Granted: 1984-06-26
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Expires: 2001-05-07
Abstract
Abstract An input protective circuit of MIS type device is used by applying reverse bias voltage to a semiconductor substrate and a variable-conductivity element is connected between the input terminal of the MIS type device and the ground so that the input terminal is in conductive state to the ground when the reverse bias voltage is not applied to the semiconductor substrate and the input terminal is in non-conductive state to the ground when the reverse bias voltage is applied to the semiconductor substrate.
Inventors
- 👤 Hideyuki Ozaki
- 👤 Kazuyasu Fujishima
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 09:31
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/08; H03K17/081; H03K17/0812; H03K17/08122
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
123 words
An input protective circuit for a MIS type semi-conductor device which is operated by applying reverse bias voltage to the substrate of said semiconductor, comprising: a MIS field-effect transistor means connected between ground and the input terminal of said MIS type device wherein said field-effect transistor means has its drain electrode connected to said input terminal of said MIS type device and the source electrode and gate electrode of said field-effect transistor means is grounded and wherein said field-effect transistor means acts as a depletion layer device which is conductive when a reverse bias is not applied to said substrate and wherein said field-effect transistor means acts as a enhancement device which is nonconductive when said reverse bias is applied to said substrate.
Claim 2
Dependent Claim
123 words
An input protective circuit for a MIS type semi-conductor device which is operated by applying reverse bias voltage to the substrate of said semiconductor, comprising: a MIS field-effect transistor means connected between ground and the input terminal of said MIS type device wherein said field-effect transistor means has its drain electrode connected to said input terminal of said MIS type device and the source electrode and gate electrode of said field-effect transistor means is grounded and wherein said field-effect transistor means acts as a depletion layer device which is conductive when a reverse bias is not applied to said substrate and wherein said field-effect transistor means acts as a enhancement device which is nonconductive when said reverse bias is applied to said substrate.
Claim 3
Dependent Claim
44 words
An input protective circuit according to claim 1 wherein said input terminal is connected to an external terminal through a resistor formed on the semiconductor substrate by a polysilicon or the impurity diffusion region having a conductive type opposite that of the semiconductor substrate.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1987-06-26 | 1987-12-26 | 1988-06-26 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1991-06-26 | 1991-12-26 | 1992-06-26 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1995-06-26 | 1995-12-26 | 1996-06-26 | $7700.00 | Window Closed / Lapsed |