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US4490737A Expired / Lapsed US ⏱️ 0.0 years remaining

Smooth glass insulating film over interconnects on an integrated circuit

Assignee: National Semiconductor Corp
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Filing: 1982-03-26
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Granted: 1984-12-25
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Expires: 2002-03-26
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Abstract

Abstract A low temperature insulating glass for use in semiconductor devices comprises a mixture of germanium, silicon, oxygen and phosphorus. In the preferred embodiment, the glass comprises a mixture of about 40% to 55% silicon dioxide (SiO 2 ), about 55% to 40% of germanium dioxide (GeO 2 ) and from 1% to about 5% of phosphorus pentoxide (P 2 O 5 ), by mole percent.

Inventors

  • 👤 John M. Pierce
  • 👤 William I. Lehrer

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 10:55
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/60; H10P14/69; H10P14/692; H10P14/6921; H10P14/6922; C; C03; C03C; C03C3/00; C03C3/04; C03C3/062; C03C3/076; C03C3/097; C03C4/00; C03C4/16; H10P14/63; H10P14/6326; H10P14/6328; H10P14/6334; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W74/00; H10W74/40; H10W74/43; H05; H05K; H05K1/00; H05K1/02; H05K1/03; H05K1/0306; H05K3/00; H05K3/22; H05K3/28; H10P14/66; H10P14/668; H10P14/6681; H10P14/6682; H10P14/6923

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 111 words
An integrated circuit comprising: a semiconductor material; insulation formed on said semiconductor material; interconnect leads formed on said insulation and selectively brought into contact with the underlying semiconductor material through openings in said insulation; and a glass layer formed on said interconnect leads, said glass layer consisting of about 45% to 50% SiO 2 , about 50% to 45% of GeO 2 and from 1% to about 5% of P 2 O 5 , by mole percent, said glass layer having a flow temperature sufficiently low to prevent damage to said leads and being capable of flowing over said leads at said flow temperature to provide a smooth glass layer surface.
Claim 2
Dependent Claim 111 words
An integrated circuit comprising: a semiconductor material; insulation formed on said semiconductor material; interconnect leads formed on said insulation and selectively brought into contact with the underlying semiconductor material through openings in said insulation; and a glass layer formed on said interconnect leads, said glass layer consisting of about 45% to 50% SiO 2 , about 50% to 45% of GeO 2 and from 1% to about 5% of P 2 O 5 , by mole percent, said glass layer having a flow temperature sufficiently low to prevent damage to said leads and being capable of flowing over said leads at said flow temperature to provide a smooth glass layer surface.
Claim 3
Dependent Claim 16 words
An integrated circuit as in claim 1 wherein said glass layer has a substantially smooth surface.
Claim 4
Dependent Claim 13 words
An integrated circuit as in claim 1, wherein said interconnect leads comprise aluminum.
Claim 5
Dependent Claim 20 words
An integrated circuit as in claim 1, wherein said interconnect leads comprise polycrystalline silicon selectively doped to a desired conductivity.
Claim 6
Dependent Claim 89 words
In combination a low temperature insulating glass and an interconnect structure of a semiconductor device, said insulating glass consisting of about 45% to 50% SiO 2 , about 50% to 45% GeO 2 and 1 to 5% of P 2 O 5 , all by mole percent, wherein said glass has a flow temperature under 1000° C. for smoothing said glass while preventing damage to said interconnect structure and wherein said glass is deposited on said structure by chemical vapor deposition at a temperature less than the flow temperature.
Claim 7
Dependent Claim 89 words
In combination a low temperature insulating glass and an interconnect structure of a semiconductor device, said insulating glass consisting of about 45% to 50% SiO 2 , about 50% to 45% GeO 2 and 1 to 5% of P 2 O 5 , all by mole percent, wherein said glass has a flow temperature under 1000° C. for smoothing said glass while preventing damage to said interconnect structure and wherein said glass is deposited on said structure by chemical vapor deposition at a temperature less than the flow temperature.
Claim 8
Dependent Claim 79 words
In combination a low-temperature insulating glass and an interconnect structure of a semiconductor device, said insulating glass consisting of about 45% to 50% SiO 2 , about 50% to 45% GeO 2 , and about 5% P 2 O 5 , all by mole percent, wherein said glass has a flow temperature under 1000° C. for smoothing said glass while preventing damage to said interconnect structure and wherein said glass is deposited on said structure by chemical vapor deposition.
Claim 9
Dependent Claim 79 words
In combination a low-temperature insulating glass and an interconnect structure of a semiconductor device, said insulating glass consisting of about 45% to 50% SiO 2 , about 50% to 45% GeO 2 , and about 5% P 2 O 5 , all by mole percent, wherein said glass has a flow temperature under 1000° C. for smoothing said glass while preventing damage to said interconnect structure and wherein said glass is deposited on said structure by chemical vapor deposition.

References Cited (Backward Citations)

US4339173A Cited
US4156250A Cited
JPS5379382A Cited
US4365264A Cited
US4271582A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1987-12-25 1988-06-25 1988-12-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1991-12-25 1992-06-25 1992-12-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1995-12-25 1996-06-25 1996-12-25 $7700.00 Window Closed / Lapsed

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