Self tuning low frequency phase shift coin examination method and apparatus

Claim 3

The method of claim 1 wherein the frequency of the transmitted low frequency signal is in the range of 1 to 75 kHz.

Claim 4

The method of claim 1 wherein the frequency of the transmitted low frequency signal is approximately 5 kHz.

Claim 7

The method of claim 4 wherein the frequency of the first signal is in the range of 1 to 75 kHz.

Claim 8

The method of claim 4 wherein the frequency of the first signal is approximately 5 kHz.

Claim 9

The method of claim 4 wherein the frequency of the first signal is monitored by squaring the first signal so that a first square wave signal having the same frequency as the first signal is produced, and monitoring the frequency of the first square wave signal.

Claim 10

The method of claim 7 wherein the frequency of the first signal is in the range of 1 to 75 kHz.

Claim 11

The method of claim 7 wherein the frequency of the first signal is approximately 5 kHz.

Claim 12

The method claim 7 wherein the phase shift between the first signal and the second signal is measured by inverting and squaring the second signal so that a second square wave signal 180° out of phase and having the same frequency as the second signal is produced, generating a rapid clock signal, and logically gating the first square wave signal, the second square wave signal and the rapid clock signal so that a plurality of output pulses are produced at the output of a logic gate means whenever the first square wave signal, the second square wave signal and the rapid clock signal are all coincidentally high.

Claim 13

The method of claim 10 wherein the frequency of the first signal is in the range of 1 to 75 kHz.

Claim 14

The method of claim 10 wherein the frequency of the first signal is approximately 5 kHz.

Claim 15

The method of claim 10 further comprising counting the output pulses at the output of the logic gate means and generating a first phase shift count indicative of the measured phase shift between the first signal and the second signal.

Claim 16

The method of claim 13 wherein the acceptable phase shift is determined by using the frequency of the first square wave signal to calculate an acceptable phase shift count.

Claim 17

The method of claim 14 further comprising the step of storing an equation relating the acceptable phase shift count to the frequency of the first signal and wherein the acceptable phase shift count is calculated by solving the stored equation using the monitored frequency of the first square wave signal.

Claim 18

The method of claim 1 wherein the step of determining an acceptable phase shift comprises generating a range of acceptable phase shift counts suitable for acceptable coins of a particular denomination coin which is to be accepted.

Claim 19

The method of claim 16 further comprising the steps of producing a measured phase shift count based upon the measured phase shift between the first and second signals and producing a signal indicative of an acceptable coin when the measured phase shift count falls within the range of acceptable phase shift counts.

Claim 20

Apparatus for examining coins comprising means defining a coin passageway, means for producing a first low frequency electrical signal, means for storing information regarding the relationship between an accepted phase shift and the frequency of the first signal, means to monitor the frequency of the first signal, a first inductor connected to the output of the first signal producing means, the first inductor being located on one side of the coin passageway and arranged to produce an electromagnetic field in the coin passageway, a second inductor located on the other side of the coin passageway from the first inductor so that coins to be examined will pass between the first and second inductors, the second inductor being arranged to receive a portion of the field and to produce a second low frequency signal as its output, means to measure the phase shift between the first signal and the second signal, means to determine the acceptable phase shift for an acceptable coin based upon the monitored frequency of the first signal and said information, and means to compare the measured phase shift and the acceptable phase shift.

Claim 21

Apparatus for examining coins comprising means defining a coin passageway, means for producing a first low frequency electrical signal, means for storing information regarding the relationship between an accepted phase shift and the frequency of the first signal, means to monitor the frequency of the first signal, a first inductor connected to the output of the first signal producing means, the first inductor being located on one side of the coin passageway and arranged to produce an electromagnetic field in the coin passageway, a second inductor located on the other side of the coin passageway from the first inductor so that coins to be examined will pass between the first and second inductors, the second inductor being arranged to receive a portion of the field and to produce a second low frequency signal as its output, means to measure the phase shift between the first signal and the second signal, means to determine the acceptable phase shift for an acceptable coin based upon the monitored frequency of the first signal and said information, and means to compare the measured phase shift and the acceptable phase shift.

Claim 22

The apparatus of claim 18 wherein the frequency of the first signal is in the range of 1 to 75 kHz.

Claim 23

The apparatus of claim 18 wherein the frequency of the first signal is approximately 5 kHz.

Claim 24

The apparatus of claim 18 wherein the means for producing the first signal comprises an oscillator having its output connected to the first inductor.

Claim 25

The apparatus of claim 18 wherein the means to monitor the frequency of the first signal comprises a first squaring circuit, the first squaring circuit producing a first square wave at its output and having an input connected to the output of the means for producing the first signal.

Claim 26

The apparatus of claim 22 wherein the first squaring circuit further comprises a second input connected to a biasing circuit and wherein its output is connected to a first input of a logic means.

Claim 27

The apparatus of claim 23 wherein the logic means comprises a microprocessor having a plurality of inputs, the microprocessor being programmed to determine the frequency of the signal applied to its first input.

Claim 28

The apparatus of claim 24 wherein the microprocessor is programmed to calculate the acceptable phase shift based upon the frequency of signal applied to its first input.