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US4562474A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor image sensor

Assignee: Individual
•
Filing: 1982-12-16
•
Granted: 1985-12-31
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Expires: 2002-12-16
📄 Original PDF 🌐 Google Patents

Abstract

Abstract A semiconductor image sensor which has photocells arranged in a matrix form is miniaturized and integrated with high density, thereby to increase its light amplification factor and operating speed. To this end, each photocell is formed by a static induction transistor which has a pair of main electrodes, a channel region formed between the main electrodes and a capacitor connected between a control region serving as a photocell and one of the row lines.

Inventors

  • 👤 Jun-ichi Nishizawa

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 01:45
CPC Classifications
H; H10; H10F; H10F39/00; H10F39/10; H10F39/12; H10F39/196; H04; H04N; H04N25/00; H04N25/70; H04N25/76

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 184 words
A semiconductor image sensor comprising: a matrix corresponding to intersections of a plurality of row lines and a plurality of column lines on a substrate; a static induction transistor photocell provided for each said intersection, each said photocell including a first main electrode connected to one of the column lines, a second main electrode connected in common to the second main electrodes of the other photocells, a channel region disposed between the first and second main electrodes, a control region, and a respective capacitor connected between each said control region and a respective row line; a respective switching transistor for each said column line, each including a control electrode; a first main electrode connected to the respective column line, and a second main electrode connected in common to the second main electrodes of the other switching transistors; and a respective video line selecting circuit for each said column line, each connected to the control electrode of the respective switching transistor; and a respective read address circuit for each said row line, connected to the gate electrode of each respective photocell via the respective capacitor.
Claim 2
Dependent Claim 184 words
A semiconductor image sensor comprising: a matrix corresponding to intersections of a plurality of row lines and a plurality of column lines on a substrate; a static induction transistor photocell provided for each said intersection, each said photocell including a first main electrode connected to one of the column lines, a second main electrode connected in common to the second main electrodes of the other photocells, a channel region disposed between the first and second main electrodes, a control region, and a respective capacitor connected between each said control region and a respective row line; a respective switching transistor for each said column line, each including a control electrode; a first main electrode connected to the respective column line, and a second main electrode connected in common to the second main electrodes of the other switching transistors; and a respective video line selecting circuit for each said column line, each connected to the control electrode of the respective switching transistor; and a respective read address circuit for each said row line, connected to the gate electrode of each respective photocell via the respective capacitor.
Claim 3
Dependent Claim 38 words
A semiconductor image sensor according to claim 1, wherein the matrix with the static induction type photocells, the switching transistors, the video line selecting circuits, the read address circuits and the load resistor are integrated on said substrate.
Claim 4
Dependent Claim 32 words
A semiconductor image sensor according to claim 1, wherein each said video line selecting circuit and read address circuit are formed by a respective shift register and are integrated on said substrate.

References Cited (Backward Citations)

JPS5113538A Cited
US4360821A Cited
US4377817A Cited
US4412236A Cited
US4454526A Cited
JPS5719468A Cited
US4450464A Cited
US4450466A Cited
US4388532A Cited
JPS5753183A Cited
US4499654A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1988-12-30 1989-07-01 1989-12-31 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1992-12-30 1993-07-01 1993-12-31 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1996-12-30 1997-07-01 1997-12-31 $7700.00 Window Closed / Lapsed

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