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US4566186A Expired / Lapsed US ⏱️ 0.0 years remaining

Multilayer interconnect circuitry using photoimageable dielectric

Assignee: Viasystems Corp
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Filing: 1984-06-29
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Granted: 1986-01-28
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Expires: 2004-06-29
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Abstract

Abstract A method of fabricating multilayer printed circuit boards using polymer thick film technology is disclosed which utilizes photoimageable dielectric material between conductive polymer thick film layers and which is capable of producing extremely small and uniformly-sized vias.

Inventors

  • 👤 Charles E. Bauer
  • 👤 William A. Bold

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 04:12
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/46; H05K3/4644; H05K3/4664; H05K3/40; H05K3/4038; H05K3/4053; H05K3/4069; H05K1/00; H05K1/02; H05K1/09; H05K1/092; H05K1/095; H05K2201/00; H05K2201/09; H05K2201/09818; H05K2201/09827; H05K2201/09981; H05K3/0011; H05K3/0017; H05K3/0023; H05K3/22; H05K3/24; H05K3/245; H05K3/30; H05K3/32; H05K3/34; H05K3/3452; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49155; Y10T29/49165

Claims Analysis

Total Claims: 17
Claim 1
Independent Claim 210 words
A method of fabricating printed circuit boards having multiple predetermined conductor patterns, multiple dielectric layers between said conductor patterns and multiple predetermined points of interconnection between said conductor patterns and through said dielectric layers, the method comprising the steps of: (a) forming a conductor pattern on a non-conducting substrate by applying a conductive polymer thick film to said substrate in a predetermined pattern and curing said film; (b) applying a layer of photoimageable photopolymerizable dielectric material over said conductor pattern; (c) forming a dielectric layer defining vias by selectively exposing in a predetermined pattern said layer of photoimageable photopolymerizable dielectric material; (d) forming vias through said layer of dielectric material, by removing monomeric portions of dielectric material corresponding to said vias, said vias communicating with predetermined points of interconnection between conductor patterns; (e) forming another conductor pattern on said dielectric layer and simultaneously forming conductive interconnections between conductor patterns and through said dielectric layer between conductor patterns by applying another conductive polymer thick film to said dielectric layer in a predetermined pattern whereby said vias are also coated with said conductive polymer thick film, and curing said film; and (f) repeating steps (b) through (e) to form multiple electrically interconnected layers of circuitry separated by multiple layers of dielectric material.
Claim 2
Independent Claim 210 words
A method of fabricating printed circuit boards having multiple predetermined conductor patterns, multiple dielectric layers between said conductor patterns and multiple predetermined points of interconnection between said conductor patterns and through said dielectric layers, the method comprising the steps of: (a) forming a conductor pattern on a non-conducting substrate by applying a conductive polymer thick film to said substrate in a predetermined pattern and curing said film; (b) applying a layer of photoimageable photopolymerizable dielectric material over said conductor pattern; (c) forming a dielectric layer defining vias by selectively exposing in a predetermined pattern said layer of photoimageable photopolymerizable dielectric material; (d) forming vias through said layer of dielectric material, by removing monomeric portions of dielectric material corresponding to said vias, said vias communicating with predetermined points of interconnection between conductor patterns; (e) forming another conductor pattern on said dielectric layer and simultaneously forming conductive interconnections between conductor patterns and through said dielectric layer between conductor patterns by applying another conductive polymer thick film to said dielectric layer in a predetermined pattern whereby said vias are also coated with said conductive polymer thick film, and curing said film; and (f) repeating steps (b) through (e) to form multiple electrically interconnected layers of circuitry separated by multiple layers of dielectric material.
Claim 3
Independent Claim 216 words
A method of fabricating printed circuit boards having multiple predetermined conductor patterns, multiple dielectric layers between said conductor patterns and multiple predetermined points of interconnection between said conductor patterns and through said dielectric layers, the method comprising the steps of: (a) forming conductor patterns on both sides of a substantially planar non-conducting substrate by applying conductive polymer thick films to both sides of said substrate in predetermined patterns and curing said films; (b) applying layers of photoimageable photopolymerizable dielectric material over said conductor patterns; (c) forming dielectric layers defining vias by selectively exposing in predetermined patterns said layers of photopolymerizable dielectric material; (d) forming vias through said layers of dielectric material by removing monomeric portions of dielectric material corresponding to said vias, said vias communicating with said predetermined points of interconnection between conductor patterns; (e) forming two additional conductor patterns on said dielectric layers and simultaneously forming conductive interconnections between conductor patterns and through the dielectric layers between conductor patterns by applying two additional conductive polymer thick films to both sides of said dielectric layers in predetermined patterns whereby said vias are also coated with said conductive polymer thick film, and curing said film; and (f) repeating steps (b) through (e) to form multiple electrically interconnected layers of circuitry separated by multiple layers of dielectric material.
Claim 4
Independent Claim 216 words
A method of fabricating printed circuit boards having multiple predetermined conductor patterns, multiple dielectric layers between said conductor patterns and multiple predetermined points of interconnection between said conductor patterns and through said dielectric layers, the method comprising the steps of: (a) forming conductor patterns on both sides of a substantially planar non-conducting substrate by applying conductive polymer thick films to both sides of said substrate in predetermined patterns and curing said films; (b) applying layers of photoimageable photopolymerizable dielectric material over said conductor patterns; (c) forming dielectric layers defining vias by selectively exposing in predetermined patterns said layers of photopolymerizable dielectric material; (d) forming vias through said layers of dielectric material by removing monomeric portions of dielectric material corresponding to said vias, said vias communicating with said predetermined points of interconnection between conductor patterns; (e) forming two additional conductor patterns on said dielectric layers and simultaneously forming conductive interconnections between conductor patterns and through the dielectric layers between conductor patterns by applying two additional conductive polymer thick films to both sides of said dielectric layers in predetermined patterns whereby said vias are also coated with said conductive polymer thick film, and curing said film; and (f) repeating steps (b) through (e) to form multiple electrically interconnected layers of circuitry separated by multiple layers of dielectric material.
Claim 5
Independent Claim 23 words
The method of claims 1 or 2 wherein said photoimageable photopolymerizeable dielectric material is selected from positive acting material and negative acting material.
Claim 6
Independent Claim 39 words
The method of claims 1 or 2 wherein said photoimageable photopolymerizeable dielectric material is negative acting material and the removal of dielectric material of step (d) is accomplished by means selected from contact with a solvent and plasma etching.
Claim 7
Independent Claim 18 words
The method of claims 1 or 2 further comprising applying a solder mask to the outermost conductor pattern(s).
Claim 8
Independent Claim 22 words
The method of claims 1 or 2 further comprising electroless nickel plating of the outermost conductor pattern(s) and conductive interconnections associated therewith.
Claim 9
Independent Claim 34 words
The method of claims 1 or 2 wherein the means of application of the conductive polymer thick film in steps (a) and (e) is selected from silk screening, printing, ink jet and pen plotter.
Claim 10
Independent Claim 32 words
The method of claims 1 or 2 wherein the means of curing said film in steps (a) and (e) is selected from a convection oven, an infrared oven and a vapor cure.
Claim 11
Independent Claim 41 words
The method of claims 1 or 2 wherein the means of applying a layer of photoimageable photopolymerizable dielectric material in step (b) is selected from silk screening, printing, dip coating, spray coating, roller coating, curtain coating, dry film lamination and casting.
Claim 12
Independent Claim 14 words
The method of claims 1 or 2 wherein the substrate comprises an epoxy resin.
Claim 13
Independent Claim 33 words
The method of claims 1 or 2 wherein the polymer thick film comprises a conductive metal dispersed in a polymer and is applied in a film about 0.5 to about 1 mil thick.
Claim 14
Independent Claim 32 words
The method of claims 1 or 2 wherein the polymer thick film comprises silver dispersed in an epoxy resin and is applied in a film about 0.5 to about 1 mil thick.
Claim 15
Independent Claim 22 words
The method of claims 1 or 2 additionally comprising heat curing said layer of photopolymerizable dielectric material between steps (d) and (e).
Claim 16
Independent Claim 21 words
The method of claims 1 or 2 wherein said photoimageable photopolymerizable dielectric material is selected from epoxy resins and acrylic resins.
Claim 17
Independent Claim 19 words
The method of claims 1 or 2 further comprising machining, drilling, routing, punching or cutting the completed circuit boards.

References Cited (Backward Citations)

US3436819A Cited
US3835531A Cited
US3922479A Cited
US3934335A Cited
US4360570A Cited
US4283243A Cited
US4305204A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-01-27 1989-07-29 1990-01-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-01-27 1993-07-29 1994-01-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-01-27 1997-07-29 1998-01-28 $7700.00 Window Closed / Lapsed

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