US4606012A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Sense amplifier
Assignee: Fujitsu Ltd
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Filing: 1984-04-04
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Granted: 1986-08-12
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Expires: 2004-04-04
Abstract
Abstract A sense amplifier comprising two asymmetrical differential amplifiers connected to each other in such a way that their outputs are accelerated to charge up one another by utilizing nodes at which potentials are changed in response to a change of the input signal supplied from a pair of bit lines or a pair of data lines, whereby the operating speed of the sense amplifier is increased.
Inventors
- 👤 Atuo Koshizuka
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 05:16
CPC Classifications
G; G11; G11C; G11C7/00; G11C7/06; G11C7/062
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
238 words
A sense amplifier comprising a pair of differential amplifier circuits, for receiving complementary input signals and producing complementary output signals, each of said differential amplifier circuits including: a pair of differential input transistors for receiving said complementary input signals, each said differential input transistor having a source connected at a common connecting point of the respective differential amplifier circuit to the source of the other differential input transistor, a gate connected to receive a respective one of said complementary input signals, and a drain, wherein said complementary signals applied to a first one of the pair of differential amplifier circuits have respective phases opposite to the phases of said complementary signals applied to the other of said pair of differential amplifier circuits; a feedback transistor having a drain connected to said commonly connecting point, a source connected to ground, and a gate connected to said drain of a first one of the differential input transistors; first pull up means connected between a power supply and to said drain of the second of the differential input transistors; and second pull up means including an output pull up transistor having a source and a drain connected between the power supply and the second differential input transistor, wherein each said output pull up transistor in each said differential amplifier circuit has a gate connected to receive an output of said feedback transistor in the other one of said differential amplifier circuits.
Claim 2
Dependent Claim
238 words
A sense amplifier comprising a pair of differential amplifier circuits, for receiving complementary input signals and producing complementary output signals, each of said differential amplifier circuits including: a pair of differential input transistors for receiving said complementary input signals, each said differential input transistor having a source connected at a common connecting point of the respective differential amplifier circuit to the source of the other differential input transistor, a gate connected to receive a respective one of said complementary input signals, and a drain, wherein said complementary signals applied to a first one of the pair of differential amplifier circuits have respective phases opposite to the phases of said complementary signals applied to the other of said pair of differential amplifier circuits; a feedback transistor having a drain connected to said commonly connecting point, a source connected to ground, and a gate connected to said drain of a first one of the differential input transistors; first pull up means connected between a power supply and to said drain of the second of the differential input transistors; and second pull up means including an output pull up transistor having a source and a drain connected between the power supply and the second differential input transistor, wherein each said output pull up transistor in each said differential amplifier circuit has a gate connected to receive an output of said feedback transistor in the other one of said differential amplifier circuits.
Claim 3
Dependent Claim
40 words
A sense amplifier as set forth in claim 1, wherein each of said differential input transistors and each said feedback transistor is an N channel MOS transistor, and each said output pull up transistor is a P channel MOS transistor.
Claim 4
Dependent Claim
31 words
A sense amplifier as set forth in claim 2, further comprising an output amplitude determining transistor connected between the source of both said output pull up transistors and said power supply.
Claim 5
Dependent Claim
59 words
A sense amplifier as set forth in claim 2, further comprising a respective P channel MOS transistor in each said differential amplifier circuit, each having its source connected to said power supply, its drain connected to the drain of the first differential input transistor, and its gate connected to a control input of the respective first pull up means.
Claim 6
Dependent Claim
29 words
A sense amplifier as set forth in claim 3, wherein said output amplitude determining transistor is a P channel MOS transistor having a gate connected to a ground line.
Claim 7
Dependent Claim
40 words
A sense amplifier as set forth in claim 3, wherein said first pull up means comprises a P channel MOS transistor with its drain connected to the drain of the output pull up transistor of the second pull up means.
Claim 8
Dependent Claim
40 words
A sense amplifier as set forth in claim 1, wherein said first pull up means comprises a P channel MOS transistor with its drain connected to the drain of the output pull up transistor of the second pull up means.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-08-11 | 1990-02-10 | 1990-08-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-08-11 | 1994-02-10 | 1994-08-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-08-11 | 1998-02-10 | 1998-08-12 | $7700.00 | Window Closed / Lapsed |