Bus transceiver including compensation circuit for variations in electrical characteristics of components

Claim 2

A bus driver system in a monolithic integrated circuit for driving an external bus in response to a data signal, the system comprising: A. selectively energizable driver means for connection to the external bus and having an energized state and a de-energized state, said driver means driving the bus when in the energized state; B. pre-driver means connected to said driver means for selectively energizing and de-energizing said driver means in response to the data signal and a reference signal, said pre-driver means being responsive to the reference signal to adjust the rate at which it switches said driver means between energized and de-energized states; C. reference means connected to said pre-driver means for generating said reference signal, said reference means comprising: i. characteristic reference signal generating means comprising pre-driver compensating means and driver compensating means each having a electrical characteristic which varies with variations in the same electrical characteristic in said pre-driver means and said driver means, respectively, said driver compensating means and said pre-driver compensating means being interconnected to generate a characteristic reference signal, and ii. reference signal generating means for generating said reference signal in response to said characteristic reference signal.

Claim 3

A bus driver system as defined in claim 1 wherein said reference signal generating means includes amplifier means connected to receive said characteristic reference signal and generating an amplified characteristic reference signal in response thereto, and a buffer means responsive to the signal from said amplifier means for generating said reference signal.

Claim 4

A bus drive system as defined in claim 2 wherein said amplifer means comprises: A. differential amplifier means for generating said amplified characteristic reference signal including a reference branch and a control branch each having a transistor having a source terminal connected to a control node controlled by a current source means controlled by a current source control signal, said reference branch transistor being controlled by a differential reference signal and said control branch transistor being controlled by said characteristic reference signal, said amplified characteristic reference signal comprising the combined differential output signals of said reference transistor and said control transistor, B. differential reference signal generating means comprising voltage divider means for generating said reference signal, and C. current source control means comprising a current mirror circuit means for generating said current source control signal.

Claim 5

A bus driver system as defined in claim 3 wherein each said reference branch and said control branch further includes a voltage drop transistor means connected to a voltage supply and to said respective reference transistor and control transistor, each voltage drop transistor means for providing a voltage drop proportional to the current passing through the respective branch, said current source means further comprising a current source transistor means connected between said control node and a ground reference terminal, said current mirror means comprising serially connected transistor means having electrical characteristics related to the electrical characteristics of both said voltage drop transistor means and said current source transistor means.

Claim 6

A bus driver system as defined in claim 3 wherein said buffer means comprises a pair of serially-connected buffer transistor means each controlled by one of the differential output signals from said differential amplifier means, said reference signal being taken from the node between said buffer transistor means.

Claim 7

A bus driver system as defined in claim 4 wherein each said pre-driver compensating means and said driver compensating means comprises transistor means connected to precision resistor means, said pre-driver compensating means being controlled by the output signal from said control branch of said differential amplifier means, said pre-driver compensating means generating an output signal for controlling said driver compensating means, said driver compensating means generating said control signal for controlling said control branch of said differential amplifier means.

Claim 8

A bus transceiver system in a monolithic integrated circuit for driving an external bus in response to a data signal and for receiving data signals from said bus, the system comprising: A. selectively energizable driver means for connection to the external bus and having an energized state and a de-energized state, said driver means driving the bus when in the energized state; B. pre-driver means connected to said driver means for selectively energizing and de-energizing said driver means in response to the data signal and a reference signal, said pre-driver means being responsive to the reference signal to adjust the rate at which it switches said driver means between energized and de-energized states; C. reference means connected to said pre-driver means for generating said reference signal, said reference means comprising: i. characteristic reference signal generating means comprising pre-driver compensating means and driver compensating means each having a electrical characteristic which varies with variations in the same electrical characteristic in said pre-driver means and said driver means, respectively, said driver compensating means and said pre-driver compensating means being interconnected to generate a characteristic reference signal, and ii. reference signal generating means for generating said reference signal in response to said characteristic reference signal; and D. a receiver stage for connection to said bus and including high-gain means for producing a voltage output signal as a function of a signal on said bus.

Claim 9

A bus transceiver system in a monolithic integrated circuit for driving an external bus in response to a data signal and for receiving data signals from said bus, the system comprising: A. selectively energizable driver means for connection to the external bus and having an energized state and a de-energized state, said driver means driving the bus when in the energized state; B. pre-driver means connected to said driver means for selectively energizing and de-energizing said driver means in response to the data signal and a reference signal, said pre-driver means being responsive to the reference signal to adjust the rate at which it switches said driver means between energized and de-energized states; C. reference means connected to said pre-driver means for generating said reference signal, said reference means comprising: i. characteristic reference signal generating means comprising pre-driver compensating means and driver compensating means each having a electrical characteristic which varies with variations in the same electrical characteristic in said pre-driver means and said driver means, respectively, said driver compensating means and said pre-driver compensating means being interconnected to generate a characteristic reference signal, and ii. reference signal generating means for generating said reference signal in response to said characteristic reference signal; and D. a receiver stage for connection to said bus and including high-gain means for producing a voltage output signal as a function of a signal on said bus.

Claim 10

A bus transceiver system as defined in claim 7 wherein said reference signal generating means includes amplifier means connected to receive said characteristic reference signal and generating an amplified characteristic reference signal in response thereto, and a buffer means responsive to the signal from said amplifier means for generating said reference signal.

Claim 11

A bus transceiver system as defined in claim 8 wherein said amplifer means comprises: A. differential amplifier means for generating said amplified characteristic reference signal including a reference branch and a control branch each having a transistor having a source terminal connected to a control node controlled by a current source means controlled by a current source control signal, said reference branch transistor being controlled by a differential reference signal and said control branch transistor being controlled by said characteristic reference signal, said amplified characteristic reference signal comprising the combined differential output signals of said reference transistor and said control transistor, B. differential reference signal generating means comprising voltage divider means for generating said reference signal, and C. current source control means comprising a current mirror circuit means for generating said current source control signal.

Claim 12

A bus transceiver system as defined in claim 9 wherein each said reference branch and said control branch further includes a voltage drop transistor means connected to a voltage supply and to said respective reference transistor and control transistor, each voltage drop transistor means for providing a voltage drop proportional to the current passing through the respective branch, said current source means further comprising a current source transistor means connected between said control node and a ground reference terminal, said current mirror means comprising serially connected transistor means having electrical characteristics related to the electrical characteristics of both said voltage drop transistor means and said current source transistor means.

Claim 13

A bus transceiver system as defined in claim 9 wherein said buffer means comprises a pair of serially-connected buffer transistor means each controlled by one of the differential output signals from said differential amplifier means, said reference signal being taken from the node between said buffer transistor means.

Claim 14

A bus transceiver system as defined in claim 10 wherein each said pre-driver compensating means and said driver compensating means comprises transistor means connected to precision resistor means, said pre-driver compensating means being controlled by the output signal from said control branch of said differential amplifier means, said pre-driver compensating means generating an output signal for controlling said driver compensating means, said driver compensating means generating said control signal for controlling said control branch of said differential amplifier means.