US4621371A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of forming by projection an integrated circuit pattern on a semiconductor wafer
Assignee: Toshiba Corp
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Filing: 1984-03-29
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Granted: 1986-11-04
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Expires: 2004-03-29
Abstract
Abstract A method of forming by projection an integrated circuit pattern on a first semiconductor wafer, wherein a plurality of reference marks are projected onto a second semiconductor wafer by the irradiation of radiant rays from a projector apparatus used to form the integrated circuit pattern onto the first semiconductor wafer. The positions of the reference marks projected onto the second semiconductor wafer are measured, thereby measuring the projection distortion peculiar to the projector apparatus. As the next step, a projection mask used to form the integrated circuit pattern is produced with the use of the measured projection distortions which has a distortion opposite that of the projector so as to offset its projection distortion. The mark is mounted in the projector apparatus, and the radiant rays are irradiated onto the mask thus projecting the integrated circuit pattern onto the first semiconductor wafer.
Inventors
- 👤 Mineo Gotou
- 👤 Shunichi Sano
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 23:19
CPC Classifications
B; B82; B82Y; B82Y10/00; G; G03; G03F; G03F7/00; G03F7/70; G03F7/70425; G03F7/70433; B82Y40/00; G03F7/7045; G03F7/70483; G03F7/70591; G03F7/706; H; H01; H01J; H01J37/00; H01J37/30; H01J37/304; H01J37/3045; H01J37/317; H01J37/3174; H01J2237/00; H01J2237/30; H01J2237/304; H01J2237/30433
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
267 words
A method of forming by projection an integrated circuit pattern on first semiconductor wafer, comprising the steps of: irradiating radiant rays onto a mask provided with a plurality of reference marks by the use of a projector apparatus which is used to form the integrated circuit pattern of said first semiconductor wafer so as to project said plurality of reference marks onto a second semiconductor wafer; measuring the projection distortions peculiar to said projector apparatus by measuring the positions of said reference marks projected onto said second semiconductor wafer; producing a projection mask for use in the formation of the integrated circuit pattern by using the measured projection distortion, said projection mask being formed by being given an opposite distortion so as to offset the projection distortion peculiar to said projector apparatus, wherein said step of producing the projection mask comprises using an electron beam exposure apparatus to perform the steps of storing in a memory said opposite distortion values (ΔXi, ΔYi) produced in accordance with said projection distortion (Δxi, Δyi), adding said opposite distortion values obtained by measuring the positions of said reference marks stored in said memory to the delineating position data corresponding to a design pattern constituting the integrated circuit pattern so as to obtain corrected delineating position data, and using a deflection signal generating circuit to change an amount of deflection of the electron beam in accordance with said corrected exposure position data; and mounting the projection mask on said projector apparatus and irradiating radiant rays onto said projection mask so as to form the integrated circuit pattern onto the first semoconductor wafer.
Claim 2
Independent Claim
267 words
A method of forming by projection an integrated circuit pattern on first semiconductor wafer, comprising the steps of: irradiating radiant rays onto a mask provided with a plurality of reference marks by the use of a projector apparatus which is used to form the integrated circuit pattern of said first semiconductor wafer so as to project said plurality of reference marks onto a second semiconductor wafer; measuring the projection distortions peculiar to said projector apparatus by measuring the positions of said reference marks projected onto said second semiconductor wafer; producing a projection mask for use in the formation of the integrated circuit pattern by using the measured projection distortion, said projection mask being formed by being given an opposite distortion so as to offset the projection distortion peculiar to said projector apparatus, wherein said step of producing the projection mask comprises using an electron beam exposure apparatus to perform the steps of storing in a memory said opposite distortion values (ΔXi, ΔYi) produced in accordance with said projection distortion (Δxi, Δyi), adding said opposite distortion values obtained by measuring the positions of said reference marks stored in said memory to the delineating position data corresponding to a design pattern constituting the integrated circuit pattern so as to obtain corrected delineating position data, and using a deflection signal generating circuit to change an amount of deflection of the electron beam in accordance with said corrected exposure position data; and mounting the projection mask on said projector apparatus and irradiating radiant rays onto said projection mask so as to form the integrated circuit pattern onto the first semoconductor wafer.
Claim 3
Dependent Claim
96 words
The method according to claim 1, wherein said projection distortion measuring step comprises the substeps of: mounting in said projector apparatus the projection distortion measuring mask formed with a plurality of marks in the form of a matrix; projecting said marks of said projection distortion measuring mask onto the second semiconductor wafer; and measuring a difference between the position of each mark formed on the second semiconductor wafer and the position at which said mark should be formed so as to measure the projection distortion (Δxi, Δyi) made on each position of the second semiconductor wafer.
Claim 4
Dependent Claim
45 words
The method according to claim 2, wherein said projection mask producing step comprises the substep wherein, when said projector apparatus is assumed to have a projection magnification of k, an opposite distortion ##EQU2## is imparted beforehand to the integrated circuit pattern on the projection mask.
Claim 5
Dependent Claim
94 words
The method according to claim 2, wherein said substep of measuring said difference between the position of each mark formed on the second semiconductor wafer and the position at which said mark should be formed is executed with the use of said electron beam exposure apparatus by: irradiating electron beams onto the second semiconductor wafer having said plurality of reference marks projected thereon; detecting electrons reflected from the second semiconductor wafer so as to detect the mark position thereon; and measuring the difference between the mark position and the mark position to be formed.
Claim 6
Dependent Claim
18 words
The method according to claim 1, wherein said projector apparatus is an optical projector apparatus for light exposure.
Claim 7
Dependent Claim
36 words
The method according to claim 1, wherein said projector apparatus is an electron beam projector apparatus for receiving light on a photoelectric conversion mask to obtain an electron beam pattern and projecting the electron beam pattern.
Claim 8
Dependent Claim
19 words
The method according to claim 1, wherein said projector apparatus is an X-ray projector apparatus for projecting X rays.
Claim 9
Independent Claim
286 words
A method of forming by projection an integrated circuit pattern on a first semiconductor wafer, comprising the steps of: mounting, in a projector apparatus which is used to form the integrated circuit pattern on the first semiconductor wafer, a projection distortion measuring mask formed with a plurality of reference marks in the form of a matrix; irradiating radiant rays onto said mask and exposing the same so as to transfer said plurality of reference marks onto a second semiconductor wafer; detecting the positions of said reference marks transferred onto the second semiconductor wafer to determine the displacement thereof from the positions at which said reference marks are to be formed; measuring the projection distortions peculiar to said projector apparatus, with respect to each square area of the matrix defined by said projected reference marks; correcting previously set integrated circuit pattern data so as to cancel the projection distortion per said square area peculiar to said projector apparatus; producing a projection mask used to form the integrated circuit pattern, by using an electron beam exposure apparatus, including performing the steps of storing in a memory opposite distortion values (ΔXi, ΔYi) produced in accordance with said projection distortion (Δxi, Δyi), adding said opposite distortion values (ΔXi, ΔYi) stored in said memory to the delineating position data corresponding to a design pattern constituting the integrated circuit pattern so as to obtain a corrected delineating position data, and using a deflection signal generating circuit to change an amount of deflection of the electron beam in accordance with said corrected delineating position data; and mounting said projection mask in said projector apparatus and irradiating said radiant rays thereto so as to project the integrated circuit pattern onto the first semiconductor wafer.
Claim 10
Independent Claim
286 words
A method of forming by projection an integrated circuit pattern on a first semiconductor wafer, comprising the steps of: mounting, in a projector apparatus which is used to form the integrated circuit pattern on the first semiconductor wafer, a projection distortion measuring mask formed with a plurality of reference marks in the form of a matrix; irradiating radiant rays onto said mask and exposing the same so as to transfer said plurality of reference marks onto a second semiconductor wafer; detecting the positions of said reference marks transferred onto the second semiconductor wafer to determine the displacement thereof from the positions at which said reference marks are to be formed; measuring the projection distortions peculiar to said projector apparatus, with respect to each square area of the matrix defined by said projected reference marks; correcting previously set integrated circuit pattern data so as to cancel the projection distortion per said square area peculiar to said projector apparatus; producing a projection mask used to form the integrated circuit pattern, by using an electron beam exposure apparatus, including performing the steps of storing in a memory opposite distortion values (ΔXi, ΔYi) produced in accordance with said projection distortion (Δxi, Δyi), adding said opposite distortion values (ΔXi, ΔYi) stored in said memory to the delineating position data corresponding to a design pattern constituting the integrated circuit pattern so as to obtain a corrected delineating position data, and using a deflection signal generating circuit to change an amount of deflection of the electron beam in accordance with said corrected delineating position data; and mounting said projection mask in said projector apparatus and irradiating said radiant rays thereto so as to project the integrated circuit pattern onto the first semiconductor wafer.
Claim 11
Dependent Claim
29 words
The method according to claim 8, wherein an electron beam delineation by said electron beam exposure apparatus is effected for each square area by a step and repeat method.
Claim 12
Dependent Claim
18 words
The method according to claim 8, wherein electron beam delineation is effected by continuously the second semiconductor wafer.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1989-11-03 | 1990-05-05 | 1990-11-04 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1993-11-03 | 1994-05-05 | 1994-11-04 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1997-11-03 | 1998-05-05 | 1998-11-04 | $7700.00 | Window Closed / Lapsed |