← Back to Patent Explorer
US4623909A Expired / Lapsed US ⏱️ 0.0 years remaining

Semiconductor photodetector

Assignee: Individual
•
Filing: 1984-02-28
•
Granted: 1986-11-18
•
Expires: 2004-02-28
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract An improved semiconductor photodetector of a type implemented with static induction transistors, and a method for driving such a device, in which data can be read out in a nondestructive mode. The static induction transistors of which the semiconductor photodetector is composed each include a gate region which forms boundaries with a channel region and in which carriers generated in response to incident light are accumulated. A structure for suppressing the depletion of carriers accumulated in the gate regions during reading of data is provided for each of the gate regions. This structure may take the form of an insulating layer which forms a potential barrier along the boundary between the gate regions and the channel region.

Inventors

  • 👤 Jun-ichi Nishizawa
  • 👤 Takashige Tamamushi

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 08:50
CPC Classifications
H; H10; H10F; H10F30/00; H10F30/20; H10F30/21; H10F30/28; H10F30/285; H10F30/2863; H10F39/00; H10F39/10; H10F39/12; H10F39/196

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 82 words
A semiconductor photodetector composed of static induction transistors including a source region, a drain region and at least one gate region, said gate region forming a boundary with a channel region and in which carriers generated in response to incident light are accumulated, wherein the improvement comprises means for suppressing the depletion of carriers accumulated in reading data by forming a potential barrier provided by an insulating layer formed along said boundary between each of said gate regions and said channel region.
Claim 2
Dependent Claim 82 words
A semiconductor photodetector composed of static induction transistors including a source region, a drain region and at least one gate region, said gate region forming a boundary with a channel region and in which carriers generated in response to incident light are accumulated, wherein the improvement comprises means for suppressing the depletion of carriers accumulated in reading data by forming a potential barrier provided by an insulating layer formed along said boundary between each of said gate regions and said channel region.
Claim 3
Dependent Claim 51 words
The semiconductor photodetector as claimed in claim 1, wherein said suppressing means comprises a second potential barrier applied with a potential which is formed in said gate region after a voltage for eliminating carriers accumulated in said first gate region is applied to said potential barrier provided by said insulating layer.
Claim 4
Dependent Claim 28 words
The semiconductor photodetector as claimed in claim 1, wherein each said static induction transistor comprises an additional gate region to which a signal reading reference potential is applied.
Claim 5
Dependent Claim 28 words
The semiconductor photodetector as claimed in claim 1, wherein each said static induction transistor comprises an additional gate region to which a signal reading reference potential is applied.
Claim 6
Dependent Claim 28 words
The semiconductor photodetector as claimed in claim 2, wherein each said static induction transistor comprises an additional gate region to which a signal reading reference potential is applied.
Claim 7
Dependent Claim 32 words
The semiconductor photodetector as claimed in any of claims 3, 4 and 5, wherein said additional gate region comprises means for suppressing the accumulation of carriers generated in response to incident light.
Claim 8
Dependent Claim 26 words
The semiconductor photodetector as claimed in any of claims 1, 2, 3, 4 and 5, wherein said static induction transistors are arranged in a one-dimensional array.
Claim 9
Dependent Claim 26 words
The semiconductor photodetector as claimed in any of claims 1, 2, 3, 4 and 5, wherein said static induction transistors are arranged in a two-dimensional array.

References Cited (Backward Citations)

US4364072A Cited
US4427990A Cited
US4470059A Cited
US4521795A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-11-17 1990-05-19 1990-11-18 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-11-17 1994-05-19 1994-11-18 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-11-17 1998-05-19 1998-11-18 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag