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US4626629A Expired / Lapsed US ⏱️ 0.0 years remaining

Digital multifrequency signal receiver

Assignee: Siemens Telecomunicazioni SpA
•
Filing: 1984-12-14
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Granted: 1986-12-02
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Expires: 2004-12-14
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Abstract

Abstract A digital multifrequency receiver circuit of the type employed between telephone system central offices, arranged to provide a faster response to received signals by processing the received signal tones digitally. The faster response resulting from the elimination of automatic gain control circuits and the use of a fixed gain amplifier used only when the received signal is below an acceptable level and the provision of a variable threshold to the individual frequency comparator circuits.

Inventors

  • 👤 Giacomo Premoli
  • 👤 Giacomo Cannalire

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 01:08
CPC Classifications
H; H04; H04Q; H04Q1/00; H04Q1/18; H04Q1/30; H04Q1/44; H04Q1/444; H04Q1/45; H04Q1/453

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 145 words
A digital detector device for telephone band multifrequency signalling comprising: a digital filter having an input to which the signal source is connected and an output, a level shifter amplifier having an input connected to the output of said digital filter and an output, a plurality of individual frequency detectors each having a first and a second input and an output, said frequency detectors each comprising; a band pass filter connected to the output of said level shifter, a digital integrator and, a comparator connected in series, a guard path circuit comprising an integrator, a digital multiplier and an adder circuit, in series, an input to said integrator connected to the output of said level shifter, and an output connected to the second input of each of said comparator circuits, said output comprising a variable reference level for said signal comparison in said comparator circuits.
Claim 2
Dependent Claim 145 words
A digital detector device for telephone band multifrequency signalling comprising: a digital filter having an input to which the signal source is connected and an output, a level shifter amplifier having an input connected to the output of said digital filter and an output, a plurality of individual frequency detectors each having a first and a second input and an output, said frequency detectors each comprising; a band pass filter connected to the output of said level shifter, a digital integrator and, a comparator connected in series, a guard path circuit comprising an integrator, a digital multiplier and an adder circuit, in series, an input to said integrator connected to the output of said level shifter, and an output connected to the second input of each of said comparator circuits, said output comprising a variable reference level for said signal comparison in said comparator circuits.
Claim 3
Dependent Claim 50 words
An arrangement as claimed in claim 1, characterized in that said level shifter comprises; an amplifier, a level detector and, a two way switch, said level detector operatively connected to control said switch to connect said amplifier into the signal path upon detecting an incoming signal below a designated level.
Claim 4
Dependent Claim 33 words
An arrangement as claimed in claim 2, characterized in that said level detector is operated to disconnect said amplifier from said signal path upon detecting an incoming signal above a second designated level.
Claim 5
Dependent Claim 23 words
An arrangement as claimed in claim 1, characterized in that said band pass filters are of an order lower than the 4th order.
Claim 6
Dependent Claim 23 words
An arrangement as claimed in claim 2, characterized in that said band pass filters are of an order lower than the 4th order.
Claim 7
Dependent Claim 23 words
An arrangement as claimed in claim 3, characterized in that said band pass filters are of an order lower than the 4th order.
Claim 8
Dependent Claim 18 words
An arrangement as claimed in claim 1, characterized in that said digital filter is comprised of a microprocessor.
Claim 9
Dependent Claim 18 words
An arrangement as claimed in claim 4, characterized in that said digital filter is comprised of a microprocessor.
Claim 10
Dependent Claim 19 words
An arrangement as claimed in claim 1, characterized in that said band pass filter is comprised of a microprocessor.
Claim 11
Dependent Claim 19 words
An arrangement as claimed in claim 7, characterized in that said band pass filter is comprised of a microprocessor.
Claim 12
Dependent Claim 20 words
An arrangement as claimed in claim 1, characterized in that said multiplier and adder circuits are comprised of a microprocessor.
Claim 13
Dependent Claim 20 words
An arrangement as claimed in claim 9, characterized in that said multiplier and adder circuits are comprised of a microprocessor.

References Cited (Backward Citations)

US4395595A Cited
US4484035A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1989-12-01 1990-06-02 1990-12-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1993-12-01 1994-06-02 1994-12-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1997-12-01 1998-06-02 1998-12-02 $7700.00 Window Closed / Lapsed

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