Drive circuit for multiple scan rate horizontal deflection circuit

Claim 2

A resonant retrace horizontal deflection circuit operable at first and second selectable horizontal scan rates comprising: means providing a drive signal having a first signal amplitude in response to the selection of said first selectable horizontal scan rate and having a second signal amplitude in response to the selection of said second selectable horizontal scan rate; and output means incorporating a deflection winding and a switching transistor having a base terminal coupled to said drive signal providing means, said switching transistor responsive to said drive signal for causing switching of said switching transistor between saturated and nonconductive states in order to provide horizontal deflection current in said deflection winding defining trace and retrace intervals, said first and second signal amplitudes determining the length of the transition interval when said switch transistor switches between said saturated and said nonconductive states.

Claim 3

A resonant retrace horizontal deflection circuit operable at multiple horizontal scan rates comprising: means for providing first horizontal rate signals at a plurality of selectable frequencies; a drive circuit having a first terminal coupled to said means for providing first horizontal rate signals, a second terminal providing horizontal rate drive signals at a frequency dependent upon the frequency of said first horizontal rate signals, and a third terminal; a horizontal output circuit incorporating a deflection winding and a switching transistor having a base terminal coupled to said drive circuit second terminal, said switching transistor responsive to said drive signals for causing switching of said switching transistor between saturated and nonconductive states in order to provide horizontal trace and retrace current in said deflection winding, said transition interval between said saturated and nonconductive states of said switching transistor being determined by the amplitude of said drive signals; and means coupled to said third terminal of said drive circuit for providing to said drive circuit a voltage having a level dependent upon the frequency of said first horizontal rate signals, the magnitude of said voltage level determining the amplitude of said drive signals.

Claim 4

A resonant retrace horizontal deflection circuit operable at multiple horizontal scan rates comprising: means for providing first horizontal rate signals at a plurality of selectable frequencies; a drive circuit having a first terminal coupled to said means for providing first horizontal rate signals, a second terminal providing horizontal rate drive signals at a frequency dependent upon the frequency of said first horizontal rate signals, and a third terminal; a horizontal output circuit incorporating a deflection winding and a switching transistor having a base terminal coupled to said drive circuit second terminal, said switching transistor responsive to said drive signals for causing switching of said switching transistor between saturated and nonconductive states in order to provide horizontal trace and retrace current in said deflection winding, said transition interval between said saturated and nonconductive states of said switching transistor being determined by the amplitude of said drive signals; and means coupled to said third terminal of said drive circuit for providing to said drive circuit a voltage having a level dependent upon the frequency of said first horizontal rate signals, the magnitude of said voltage level determining the amplitude of said drive signals.

Claim 5

The arrangement defined in claim 1, wherein said switching transistor has switching characteristics determined by said first and second signal amplitudes.

Claim 6

The arrangement defined in claim 2, wherein said voltage level magnitude determines the reverse base current amplitude of said switching transistor.

Claim 7

The arrangement defined in claim 2, wherein said means for providing a voltage comprises a DC voltage supply for generating a DC voltage having different voltage levels in response to different selected scan frequencies in order to provide different peak reverse base current amplitudes for said switching transistor.