Integrated circuit compatible thin film field effect transistor and method of making same

Claim 2

An integrated circuit compatible thin film field effect transistor comprising: a silicon-germanium alloy body, said body having a structure more ordered than amorphous silicon-germanium semiconductor material and less ordered than single crystalline semiconductor material; source and drain electrodes of amorphous semiconductor material forming rectifying contacts with said body; and a gate electrode adjacent to and insulated from said body.

Claim 3

The thin film field effect transistor as defined in claim 1 wherein said source and drain electrodes are formed on said body.

Claim 4

The thin film field effect transistor as defined in claim 2 wherein said source and drain electrodes are deposits of a doped semiconductor on said body.

Claim 5

The thin film field effect transistor as defined in claim 3 wherein said amorphous semiconductor alloy includes silicon.

Claim 6

The thin film field effect transistor as defined in claim 4 wherein said amorphous silicon alloy includes hydrogen.

Claim 7

The thin film field effect transistor as defined in claim 4 wherein said amorphous silicon alloy includes fluorine.

Claim 8

The thin film field effect transistor as defined in claim 3 wherein said body is p-type and said doped semiconductor is n-type.

Claim 9

The thin film field effect transistor as defined in claim 7 wherein said doped semiconductor includes phosphorus.

Claim 10

The thin film field effect transistor as defined in claim 3 wherein said body is n-type and said doped semiconductor is p-type.

Claim 11

The thin film field effect transistor as defined in claim 1 wherein said body further includes hydrogen.

Claim 12

The thin film field effect transistor as defined in claim 1 wherein said body further includes fluorine.

Claim 13

The thin film field effect transistor as defined in claim 1 further including an insulative layer disposed between said gate electrode and said body.

Claim 14

The thin film field effect transistor as defined in claim 12 wherein said insulative layer is formed from silicon oxide or silicon nitride.

Claim 15

The thin film field effect transistor as defined in claim 1 wherein said gate electrode is formed from a metal.

Claim 16

The thin film field effect transistor as defined in claim 14 wherein said metal is chromium or aluminum.

Claim 17

An improved system for selectively addressing each element of an array of elements, said system including: a first set of address lines; a second set of address lines spaced from and crossing at an angle to said first set of address lines to form a plurality of crossover points therewith; each said crossover point being associated with a given one of said elements to be addressed; an isolation device associated with each said element to be addressed; and addressing circuitry coupled to said first and second sets of address lines for selectively applying addressing potentials to respective pairs of said first and second sets of address lines, said addressing circuitry including at least one integrated circuit compatible thin film field effect transistor, said transistor comprising a silicon-germanium alloy body, said body having a structure more ordered than amorphous silicon-germanium semiconductor material and less ordered than single crystalline semiconductor material, source and drain electrodes formed by amorphous semiconductor material providing rectifying contacts with said body, and a gate electrode adjacent to and insulated from said body.

Claim 18

An improved system for selectively addressing each element of an array of elements, said system including: a first set of address lines; a second set of address lines spaced from and crossing at an angle to said first set of address lines to form a plurality of crossover points therewith; each said crossover point being associated with a given one of said elements to be addressed; an isolation device associated with each said element to be addressed; and addressing circuitry coupled to said first and second sets of address lines for selectively applying addressing potentials to respective pairs of said first and second sets of address lines, said addressing circuitry including at least one integrated circuit compatible thin film field effect transistor, said transistor comprising a silicon-germanium alloy body, said body having a structure more ordered than amorphous silicon-germanium semiconductor material and less ordered than single crystalline semiconductor material, source and drain electrodes formed by amorphous semiconductor material providing rectifying contacts with said body, and a gate electrode adjacent to and insulated from said body.

Claim 19

The system as defined in claim 16 wherein said source and drain electrodes of said thin film field effect transistor are formed on said body.

Claim 20

The system as defined in claim 17 wherein said source and drain electrodes are deposits of a doped semiconductor on said body.

Claim 21

The system as defined in claim 18 wherein said amorphous semiconductor alloy includes silicon.

Claim 22

The system as defined in claim 19 wherein said amorphous silicon alloy includes hydrogen.

Claim 23

The system as defined in claim 19 wherein said amorphous silicon alloy includes fluorine.

Claim 24

The system as defined in claim 18 wherein said body is p-type and said doped semiconductor is n-type.

Claim 25

The system as defined in claim 22 wherein said doped semiconductor includes phosphorus.

Claim 26

The system as defined in claim 18 wherein said body is n-type and said doped semiconductor is p-type.

Claim 27

The system as defined in claim 16 wherein said body of said thin film field effect transistor further includes hydrogen.

Claim 28

The system as defined in claim 16 wherein said body of said thin film field effect transistor further includes fluorine.

Claim 29

The system as defined in claim 16 wherein said thin film field effect transistor further includes an insulative layer disposed between said gate electrode and said body.

Claim 30

The system as defined in claim 27 wherein said insulative layer is formed from silicon oxide or silicon nitride.

Claim 31

The system as defined in claim 16 wherein said gate electrode of said thin film field effect transistor is formed from a metal.

Claim 32

The system as defined in claim 29 wherein said metal is chromium or aluminum.

Claim 33

The system as defined in claim 16 wherein said isolation devices are thin film field effect transistors including amorphous semiconductor alloy materials.

Claim 34

The system as defined in claim 16 wherein said isolation devices and said addressing circuitry including said thin film field effect transistor are formed on a common substrate.