US4673966A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor integrated circuit
Assignee: Mitsubishi Electric Corp
•
Filing: 1984-04-11
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Granted: 1987-06-16
•
Expires: 2004-04-11
Abstract
Abstract A semiconductor integrated circuit comprising a plurality of blocks the included circuit components, where the blocks are separated from each other in a semiconductor substrate. Wiring is conducted by using horizontal and verticle wirings along the horizontal and vertical lines of an imaginary wiring grid established in a wiring region between the blocks and diagonal wirings are provided in the process of producing the blocks, wherein the diagonal directions are relative to the horizontal and vertical directions of the imaginary wiring grid.
Inventors
- 👤 Hiroyoshi Shimoyama
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 10:41
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/41; H10W20/43; H10D; H10D84/00; H10D84/90
Claims Analysis
Total Claims: 51
Claim 1
Independent Claim
354 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said diagonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines, with adjacent colinear diagonal wiring portions in each set of diagonal wiring portions having equal distance gaps therebetween; gap connector means disposed in selected ones of said equal distance gaps for creating diagonal wirings of varying lengths from said diagonal wiring portions; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer, for electrically interconnecting said circuit cells through said first layer of wirings, said rectangular wiring means including a first plurality of wirings substantially aligned with selected ones of said first lines and further including a second plurality of wirings substantially aligned with selected ones of said second lines, said first plurality of wirings, said second plurality of wirings and said diagonal wirings of varying lengths providing electrical connections between said plurality of wiring terminals of said circuit cells, said diagonal wirings of varying lengths being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 2
Dependent Claim
354 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said diagonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines, with adjacent colinear diagonal wiring portions in each set of diagonal wiring portions having equal distance gaps therebetween; gap connector means disposed in selected ones of said equal distance gaps for creating diagonal wirings of varying lengths from said diagonal wiring portions; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer, for electrically interconnecting said circuit cells through said first layer of wirings, said rectangular wiring means including a first plurality of wirings substantially aligned with selected ones of said first lines and further including a second plurality of wirings substantially aligned with selected ones of said second lines, said first plurality of wirings, said second plurality of wirings and said diagonal wirings of varying lengths providing electrical connections between said plurality of wiring terminals of said circuit cells, said diagonal wirings of varying lengths being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 3
Dependent Claim
30 words
The semiconductor integrated circuit of claim 1 wherein each of said adjacent colinear diagonal wiring portions pass through diagonally adjacent said intersection points and are separated by a predetermined gap.
Claim 4
Dependent Claim
32 words
The semiconductor circuit of claim 1 wherein each of said diagonal wiring portions pass through one of said intersection points, each said diagonal wiring portion bisecting at least two rectangular frame portions.
Claim 5
Dependent Claim
18 words
The semiconductor integrated circuit of claim 1 wherein said diagonal wiring portions are composed of impurity diffused layers.
Claim 6
Dependent Claim
17 words
The semiconductor integrated circuit of claim 1 wherein said diagonal wiring portions are composed of polycrystalline silicon.
Claim 7
Dependent Claim
91 words
The semiconductor integrated circuit of claim 1 wherein said rectangular wiring means comprises: a second layer of wirings, said second layer of wirings comprising said first plurality of wirings; a third layer of wirings, said third layer of wirings comprising said second plurality of wirings; and a second insulating layer disposed between said second layer and said third layer of wirings, said second insulating layer having a plurality of through holes to enable connection between said first plurality of wirings and said second plurality of wirings at selected said intersection points.
Claim 8
Dependent Claim
23 words
The semiconductor integrated circuit of claim 6 wherein said first plurality of wirings and said second plurality of wirings are composed of aluminum.
Claim 9
Dependent Claim
28 words
The semiconductor integrated circuit of claim 1 wherein said gap connector means electrically connects selected colinear adjacent diagonal wiring portions to create said diagonal wirings of varying lengths.
Claim 10
Dependent Claim
16 words
The semiconductor integrated circuit of claim 8 wherein said gap connector means includes gap contact wiring.
Claim 11
Dependent Claim
16 words
The semiconductor integrated circuit of claim 9 wherein said gap contact wiring is composed of aluminum.
Claim 12
Dependent Claim
247 words
A semiconductor integrated circuit formed on a substrate, comprising: a plurality of circuit cells; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said digonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines; gap connector means for creating diagonal wirings of varying lengths from sets of said diagonal wiring portions corresponding to selected ones of said diagonal lines; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer for electrically interconnecting said circuit cells through connections of said first layer of wirings and wiring in said rectangular wiring means.
Claim 13
Dependent Claim
247 words
A semiconductor integrated circuit formed on a substrate, comprising: a plurality of circuit cells; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said digonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines; gap connector means for creating diagonal wirings of varying lengths from sets of said diagonal wiring portions corresponding to selected ones of said diagonal lines; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer for electrically interconnecting said circuit cells through connections of said first layer of wirings and wiring in said rectangular wiring means.
Claim 14
Dependent Claim
21 words
The semiconductor integrated circuit of claim 11 wherein adjacent colinear ones of said diagonal wiring portions have equal distance gaps therebetween.
Claim 15
Dependent Claim
30 words
The semiconductor integrated circuit of claim 12 wherein each of said adjacent colinear diagonal wiring portions pass through diagonally adjacent said intersection points and are separated by a predetermined gap.
Claim 16
Dependent Claim
32 words
The semiconductor circuit of claim 11 wherein each of said diagonal wiring portions pass through one of said intersection points, each said diagonal wiring portion bisecting at least two rectangular frame portions.
Claim 17
Dependent Claim
18 words
The semiconductor integrated circuit of claim 11 wherein said diagonal wiring portions are composed of impurity diffused layers.
Claim 18
Dependent Claim
17 words
The semiconductor integrated circuit of claim 11 wherein said diagonal wiring portions are composed of polycrystalline silicon.
Claim 19
Dependent Claim
89 words
The semiconductor integrated circuit of claim 11 wherein said rectangular means comprises a first plurality of wirings substantially aligned with selected ones of said first lines and further including a second plurality of wirings substantially aligned with selected ones of said second lines, said first plurality of wirings, said second plurality of wirings and said diagonal wirings of varying lengths providing electrical connections between said circuit cells, said diagonal wirings of varying lengths being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 20
Dependent Claim
91 words
The semiconductor integrated circuit of claim 17 wherein said rectangular wiring means comprises: a second layer of wirings, said second layer of wirings comprising said first plurality of wirings; a third layer of wirings, said third layer of wiring comprising said second plurality of wirings; and a second insulating layer disposed between said second layer and said third layer of wirings, said second insulating layer having a plurality of through holes to enable connection between said first plurality of wirings and said second plurality of wirings at selected said intersection points.
Claim 21
Dependent Claim
23 words
The semiconductor integrated circuit of claim 18 wherein said first plurality of wirings and said second plurality of wirings are composed of aluminum.
Claim 22
Dependent Claim
31 words
The semiconductor integrated circuit of claim 19 wherein said gap connector means electrically connects selected colinear adjacent ones of said diagonal wiring portions to create said diagonal wirings of varying lengths.
Claim 23
Dependent Claim
17 words
The semiconductor integrated circuit of claim 20 wherein said gap connector means includes a gap contact wiring.
Claim 24
Dependent Claim
16 words
The semiconductor integrated circuit of claim 21 wherein said gap contact wiring is composed of aluminum.
Claim 25
Dependent Claim
237 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of said lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said diagonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines, with adjacent colinear ones of said diagonal wiring portions in each set of diagonal wiring portions having equal distance gaps therebetween, said diagonal wiring portions of each set of diagonal wiring portions being connectable to provide diagonal wirings of varying lengths for connecting said circuit cells.
Claim 26
Dependent Claim
237 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being substantially parallel to said first and second parallel edges and being equispaced apart, said reference field also including a plurality of said lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points, said reference field including a plurality of diagonal lines bisecting said rectangular frame portions, said diagonal lines passing through said intersection points, said diagonal lines being equispaced and parallel; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions, a set of diagonal wiring portions being disposed along each of said diagonal lines, with adjacent colinear ones of said diagonal wiring portions in each set of diagonal wiring portions having equal distance gaps therebetween, said diagonal wiring portions of each set of diagonal wiring portions being connectable to provide diagonal wirings of varying lengths for connecting said circuit cells.
Claim 27
Dependent Claim
52 words
The semiconductor integrated circuit of claim 23 wherein said diagonal wiring portions are connectable together by bridging said equal distance gaps to form diagonal wirings of varying lengths, said diagonal wirings of varying lengths being connectable to additional wirings extending in said first or second directions to electrically connect said circuit cells.
Claim 28
Dependent Claim
158 words
The semiconductor integrated circuit of claim 23 further comprising: gap connector means disposed in selected ones of said equal distance gaps for creating diagonal wirings of varying lengths from said diagonal wiring portions, said gap connector means including a gap contact wiring; and rectangular wiring means disposed on said first insulating layer for electrically interconnecting said circuit cells through said first layer of wirings, said rectangular wiring means including a first plurality of wirings composed of aluminum substantially aligned with selected ones of said first lines and further including a second plurality of wirings composed of aluminum substantially aligned with selected ones of said second lines, said first plurality of wirings, said second plurality of wirings and said diagonal wirings of varying lengths providing electrical connections between said plurality of wiring terminals of said circuit cells, said diagonal wirings of varying lengths being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 29
Dependent Claim
22 words
The semiconductor integrated circuit of claim 25, wherein each of said adjacent colinear diagonal wiring portions pass through diagonally adjacent intersection points.
Claim 30
Dependent Claim
18 words
The semiconductor integrated circuit of claim 26 wherein said diagonal wiring portions are composed of impurity diffused layers.
Claim 31
Dependent Claim
17 words
The semiconductor integrated circuit of claim 27 wherein said diagonal wiring portions are composed of polycrystalline silicon.
Claim 32
Dependent Claim
91 words
The semiconductor integrated circuit of claim 26 wherein said rectangular wiring means comprises: a second layer of wirings, said second layer of wirings comprising said first plurality of wirings; a third layer of wirings, said third layer of wirings comprising said second plurality of wirings; and a second insulating layer disposed between said second layer and said third layer of wirings, said second insulating layer having a plurality of through holes to enable connection between said first plurality of wirings and said second plurality of wirings at selected said intersection points.
Claim 33
Dependent Claim
28 words
The semiconductor integrated circuit of claim 29 wherein said gap connector means electrically connects selected colinear adjacent diagonal wiring portions to create said diagonal wirings of varying lengths.
Claim 34
Dependent Claim
16 words
The semiconductor integrated circuit of claim 30 wherein said gap contact wiring is composed of aluminum.
Claim 35
Dependent Claim
32 words
The semiconductor circuit of claim 25 wherein each of said diagonal wiring portions pass through one of said intersection points, each said diagonal wiring portion bisecting at least two rectangular frame portions.
Claim 36
Dependent Claim
18 words
The semiconductor integrated circuit of claim 32 wherein said diagonal wiring portions are composed of impurity diffused layers.
Claim 37
Dependent Claim
17 words
The semiconductor integrated circuit of claim 32 wherein said diagonal wiring portions are composed of polycrystalline silicon.
Claim 38
Dependent Claim
91 words
The semiconductor integrated circuit of claim 32 wherein said rectangular wiring means comprises: a second layer of wirings, said second layer of wirings comprising said first plurality of wirings; a third layer of wirings, said third layer of wirings comprising said second plurality of wirings; and a second insulating layer disposed between said second layer and said third layer of wirings, said second insulating layer having a plurality of through holes to enable connection between said first plurality of wirings and said second plurality of wirings at selected said intersection points.
Claim 39
Dependent Claim
28 words
The semiconductor integrated circuit of claim 35 wherein said gap connector means electrically connects selected colinear adjacent diagonal wiring portions to create said diagonal wirings of varying lengths.
Claim 40
Dependent Claim
16 words
The semiconductor integrated circuit of claim 36 wherein said gap contact wiring is composed of aluminum.
Claim 41
Dependent Claim
318 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being parallel to said first and second substantially parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions extending diagonally across said reference field and passing through said intersection points, with adjacent colinear diagonal wiring portions having equal distance gaps therebetween; gap connector means disposed in selected ones of said equal distance gaps for creating diagonal wirings of varying lengths from said diagonal wiring portions; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer for electrically interconnecting said circuit cells together with said first layer of wirings, said rectangular wiring means including a first plurality of wirings substantially aligned with selected ones of said first lines and further including a second plurality of wirings substantially aligned with selected ones or said second lines, said first plurality of wirings of said second plurality of wirings, and said diagonal wirings of varying lengths providing electrical connections between selected ones of said plurality of wiring terminals of said circuit cells, said diagonal wirings being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 42
Dependent Claim
318 words
A semiconductor integrated circuit formed on a substrate comprising: a plurality of circuit cells, each of said circuit cells having a plurality of wiring terminals; a wiring region disposed between said circuit cells, said wiring region having first and second substantially parallel edges, each said edge being juxtaposed with a said circuit cell, said wiring region being divided into a plurality of rectangular frame portions by a reference field, said reference field including a plurality of first lines, said first lines being parallel to said first and second substantially parallel edges and being equispaced apart, said reference field also including a plurality of second lines, said second lines being equispaced and orthogonally disposed with respect to said first lines, said first and second lines intersecting at a plurality of intersection points; a first layer of wirings, said first layer of wirings comprising a plurality of diagonal wiring portions extending diagonally across said reference field and passing through said intersection points, with adjacent colinear diagonal wiring portions having equal distance gaps therebetween; gap connector means disposed in selected ones of said equal distance gaps for creating diagonal wirings of varying lengths from said diagonal wiring portions; a first insulating layer disposed atop said first layer of wirings; and rectangular wiring means, disposed on said first insulating layer for electrically interconnecting said circuit cells together with said first layer of wirings, said rectangular wiring means including a first plurality of wirings substantially aligned with selected ones of said first lines and further including a second plurality of wirings substantially aligned with selected ones or said second lines, said first plurality of wirings of said second plurality of wirings, and said diagonal wirings of varying lengths providing electrical connections between selected ones of said plurality of wiring terminals of said circuit cells, said diagonal wirings being connectable to said rectangular wiring means via through holes disposed in said first insulating layer.
Claim 43
Dependent Claim
26 words
The semiconductor integrated circuit of claim 38 wherein said adjacent colinear diagonal wiring portions pass through diagonally adjacentintersection points and are separated by a predetermined gap.
Claim 44
Dependent Claim
32 words
The semiconductor circuit of claim 38 wherein each of said diagonal wiring portions pass through one of said intersection points, each said diagonal wiring portion bisecting at least two rectangular frame portions.
Claim 45
Dependent Claim
18 words
The semiconductor integrated circuit of claim 38 wherein said diagonal wiring portions are composed of impurity diffused layers.
Claim 46
Dependent Claim
17 words
The semiconductor integrated circuit of claim 38 wherein said diagonal wiring portions are composed of polycrystalline silicon.
Claim 47
Dependent Claim
91 words
The semiconductor integrated circuit of claim 38 wherein said rectangular wiring means comprises: a second layer of wirings, said second layer of wirings comprising said first plurality of wirings; a third layer of wirings, said third layer of wirings comprising said second plurality of wirings; and a second insulating layer disposed between said second layer and said third layer of wirings, said second insulating layer having a plurality of through holes to enable connection between said first plurality of wirings and said second plurality of wirings at selected said intersection points.
Claim 48
Dependent Claim
22 words
The semiconductor integrated circuit of claim 43 wherein said first plurality of wirings and said plurality of wirings are composed of aluminum.
Claim 49
Dependent Claim
28 words
The semiconductor integrated circuit of claim 38 wherein said gap connector means electrically connects selected colinear adjacent diagonal wiring portions to create said diagonal wirings of varying lengths.
Claim 50
Dependent Claim
17 words
The semiconductor integrated circuit of claim 45 wherein said gap connector means includes a gap contact wiring.
Claim 51
Dependent Claim
16 words
The semiconductor integrated circuit of claim 46 wherein said gap contact wiring is composed of aluminum.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-06-15 | 1990-12-15 | 1991-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-06-15 | 1994-12-15 | 1995-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-06-15 | 1998-12-15 | 1999-06-16 | $7700.00 | Window Closed / Lapsed |