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US4694466A Expired / Lapsed US ⏱️ 0.0 years remaining

Time sharing frequency synthesizer

Assignee: ITT Inc
•
Filing: 1985-06-03
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Granted: 1987-09-15
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Expires: 2005-06-03
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Abstract

Abstract A frequency synthesizer circuit operates in a time shared mode. Thus the frequency synthesizer circuit operates to transmit and/or receive a particular frequency for a chosen small amount of time and then sequentially transmits and/or receives the other frequencies for chosen small amounts of time. After all the chosen frequencies have been transmitted and/or received the synthesizer circuit will return to the first of frequency and begin to repeat the process in cyclical fashion.

Inventors

  • 👤 Joseph Kadin

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 14:19
CPC Classifications
H; H04; H04L; H04L27/00; H04L27/26

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 147 words
A time sharing frequency synthesizer circuit, comprising: means for synthesizing a plurality of desired frequencies one at a time for predetermined intervals in a desired sequence, said means comprising a reference oscillator, a microprocessor containing values corresponding to a table of desired output frequencies for a frequency synthesizing device, said microprocessor being connected to an output of said reference oscillator, and a frequency synthesizer which is connected to an output of said reference oscillator and an output of said microprocessor and which contains circuitry for converting the output of said reference oscillator into any desired frequency, means for heterodyning each of said desired frequencies with one or more signals with frequencies within a desired bandwidth to generate intermediate frequencies at a sample rate consistent with the Nyquist criteria of sampling at a frequency at least twice the effective bandwidth; and means for discriminating among said intermediate frequencies.
Claim 2
Dependent Claim 147 words
A time sharing frequency synthesizer circuit, comprising: means for synthesizing a plurality of desired frequencies one at a time for predetermined intervals in a desired sequence, said means comprising a reference oscillator, a microprocessor containing values corresponding to a table of desired output frequencies for a frequency synthesizing device, said microprocessor being connected to an output of said reference oscillator, and a frequency synthesizer which is connected to an output of said reference oscillator and an output of said microprocessor and which contains circuitry for converting the output of said reference oscillator into any desired frequency, means for heterodyning each of said desired frequencies with one or more signals with frequencies within a desired bandwidth to generate intermediate frequencies at a sample rate consistent with the Nyquist criteria of sampling at a frequency at least twice the effective bandwidth; and means for discriminating among said intermediate frequencies.
Claim 3
Dependent Claim 57 words
The circuit of claim 1, further comprising a frequency hopping filter connected to receive incoming signals and to convey the incoming signals which pass therethrough to said means for heterodyning, said hopping filter being connected to and controlled by said microprocessor which contains values corresponding to a table of desired center frequencies for said frequency hopping filter.
Claim 4
Dependent Claim 20 words
The circuit of claim 2, further comprising clock means for sending time signals to said microprocessor and said frequency synthesizer.
Claim 5
Dependent Claim 75 words
The circuit of claim 2, further comprising a second frequency hopping filter connected to the output of said reference oscillator and functioning to restrict outgoing signals from the circuit within desired bandwidths and to convey outgoing signals which pass therethrough to a second heterodyning means, said second frequency hopping filter being connected to and controlled by said microprocessor which contains values corresponding to a table of desired center frequencies for said second frequency hopping filter.
Claim 6
Dependent Claim 38 words
The circuit of claim 4, further comprising a duplexer connected to said heterodyning means and to said second heterodyning means enabling signals to be transmitted and received by said time sharing frequency synthesizer circuit through a single antenna.
Claim 7
Dependent Claim 32 words
The circuit of claim 2, further comprising means for multiplexing in sequential fashion signals which have passed through said heterodyning means, said means for multiplexing conveying said multiplexed signals to different channels.
Claim 8
Dependent Claim 20 words
The circuit of claim 6, further comprising clock means for sending timing signals to said microprocessor and said frequency synthesizer.

References Cited (Backward Citations)

US4193030A Cited
US4030033A Cited
US4079378A Cited
US4267592A Cited
US4309703A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1990-09-14 1991-03-16 1991-09-15 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1994-09-14 1995-03-16 1995-09-15 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1998-09-14 1999-03-16 1999-09-15 $7700.00 Window Closed / Lapsed

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