US4694500A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Control voltage generating circuit for activating a noise reduction circuit in an FM stereo receiver
Assignee: Faurecia Clarion Electronics Co Ltd
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Filing: 1986-02-28
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Granted: 1987-09-15
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Expires: 2006-02-28
Abstract
Abstract A high-cut and high-blend control voltage generating circuit for activating a noise reduction circuit of an FM stereo receiver is configured to be simply responsive to multipath noises and never to plug noises. A changing and discharging circuit in the control voltage circuit may have a relatively long charging time constant, and the voltage control circuit may be configured to be simply responsive to multipath noises above a predetermined level. Thus the circuit is much less liable to operate erroneously.
Inventors
- 👤 Satoru Tazaki
- 👤 Yasuhiro Yoshioka
- 👤 Kiyoshi Amazawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 16:09
CPC Classifications
H; H04; H04H; H04H40/00; H04H40/18; H04H40/27; H04H40/36; H04H40/45; H04H40/72; H04B; H04B1/00; H04B1/06; H04B1/10; H04B1/1027; H04B1/16; H04B1/1646; H04B1/1661; H04B1/1669; H04B1/1676
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
182 words
A control voltage generating circuit for activating a noise reduction circuit in an FM stereo receiver which generates an S meter output voltage, comprising: an in-phase amplifier in which negative ripple components in the S meter output voltage are entered; a first fixed voltage source fixing a first current value; a comparator for comparing said first current value with a second current value which is produced by said in-phase amplifier and which corresponds to said negative ripple components, and for supplying an output current when said second current value exceeds said first current value; a charging and discharging circuit to which a capacitor is connected; a charging and discharging control circuit which produces a control voltage responsive to said output current from said comparator and controls a discharge from said capacitor via said charging and discharging circuit in response to said control voltage; and a level shifting circuit which controls the level of d.c. components from the S meter output voltage in response to the discharge of said capacitor and produces a high-cut and high-blend control voltage corresponding to said d.c. components.
Claim 2
Dependent Claim
182 words
A control voltage generating circuit for activating a noise reduction circuit in an FM stereo receiver which generates an S meter output voltage, comprising: an in-phase amplifier in which negative ripple components in the S meter output voltage are entered; a first fixed voltage source fixing a first current value; a comparator for comparing said first current value with a second current value which is produced by said in-phase amplifier and which corresponds to said negative ripple components, and for supplying an output current when said second current value exceeds said first current value; a charging and discharging circuit to which a capacitor is connected; a charging and discharging control circuit which produces a control voltage responsive to said output current from said comparator and controls a discharge from said capacitor via said charging and discharging circuit in response to said control voltage; and a level shifting circuit which controls the level of d.c. components from the S meter output voltage in response to the discharge of said capacitor and produces a high-cut and high-blend control voltage corresponding to said d.c. components.
Claim 3
Dependent Claim
56 words
A control voltage generating circuit of claim 1, wherein said in-phase amplifier is a differential amplifier which includes two transistors, the base bias of one of said transistors nearer to an input of said circuit being higher by a predetermined potential than the base bias of the other transistor nearer to an output of said circuit.
Claim 4
Dependent Claim
44 words
A control voltage generating circuit of claim 1 wherein said charging and discharging control circuit is configured to cause a current of said charging and discharging circuit which effects variation of said control voltage to be n times said output current of said comparator.
Claim 5
Dependent Claim
29 words
A control voltage generating circuit of claim 1 further comprising means for providing said circuit with a dead zone by adjusting said first current value flowing through said comparator.
Claim 6
Dependent Claim
80 words
A control voltage generating circuit of claim 1, wherein said comparator includes a current mirror circuit having a plurality of first transistors, and said charging and discharging control circuit includes two second transistors and includes first and second emitter resistors which are each connected to the emitter of a respective one of said second transistors, the rate of discharging of said capacitor being a function of the resistance proportion of said first and second emitter resistors for said second transistors.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-09-14 | 1991-03-16 | 1991-09-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-09-14 | 1995-03-16 | 1995-09-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-09-14 | 1999-03-16 | 1999-09-15 | $7700.00 | Window Closed / Lapsed |