Patent US2578499A successfully refreshed from Google Patents.
US4708545A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for drilling reference holes in multi-layer printed wiring board assembly
Assignee: Panasonic Electric Works Co Ltd
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Filing: 1985-11-14
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Granted: 1987-11-24
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Expires: 2005-11-14
Abstract
Abstract A method for drilling reference holes in a multi-layer printed wiring board assembly, in which drilling position marks provided on inner-layer circuit board in the assembly are roughly detected through each of two outer-layer boards of the assembly, a spot-facing is made with respect to the outer-layer boards at roughly detected points of the marks, and thereafter the marks are precisely detected at the faced spots. Positions for drilling the reference holes can be thereby determined at the spots precisely in close proximity to the internally provided drilling position marks, to allow the drilling performed very accurately in simpler and economical manner.
Inventors
- 👤 Toshinori Fujii
- 👤 Shinji Okamoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 12:32
CPC Classifications
B; B23; B23Q; B23Q35/00; B23Q35/02; G; G03; G03F; G03F9/00; H; H05; H05K; H05K3/00; H05K3/46; H05K3/4611; H05K3/4638; H05K1/00; H05K1/02; H05K1/0266; H05K1/0269; H05K2201/00; H05K2201/08; H05K2201/083; H05K2201/09; H05K2201/09209; H05K2201/09654; H05K2201/09781; H05K2203/00; H05K2203/10; H05K2203/101; H05K3/0008; H05K3/0011; H05K3/0044; H05K3/0047; Y; Y10; Y10T; Y10T408/00; Y10T408/03; Y10T409/00; Y10T409/30; Y10T409/303752
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
227 words
A method for drilling reference holes in a multi-layer printed wiring board assembly having an inner-layer circuit board with a circuit pattern thereon, and an outer-layer board, comprising the steps of: providing drilling position marks for said reference holes on said inner-layer circuit board, providing positioning marks made of a conductive foil at prescribed related positions to said drilling position marks and in the vicinity of said circuit pattern of said inner-layer circuit board, stacking said outer-layer board on an outer surface of at least one side of said inner-layer circuit board, detceting said positioning marks by scanning said wiring board assembly, with an eddy current sensor mounted exteriorly of said outer-layer board, in predetermined directions and sensing any variation in eddy current loss, roughly estimating the locations of said drilling position marks on the basis of said detected positioning marks and spot-facing the outer surface of the outer-layer board at said locations, precisely detecting one of said drilling position marks at one of said spot-faced locations by irradiating light onto said spot-faced location on one side of said assembly, monitoring a lighted image of said drilling position mark at said spot-faced location on the other side of said assembly, and indexing the center of said drilling position mark in said monitored image thereof, and drilling reference holes through the stacked boards at said drilling position marks.
Claim 2
Independent Claim
227 words
A method for drilling reference holes in a multi-layer printed wiring board assembly having an inner-layer circuit board with a circuit pattern thereon, and an outer-layer board, comprising the steps of: providing drilling position marks for said reference holes on said inner-layer circuit board, providing positioning marks made of a conductive foil at prescribed related positions to said drilling position marks and in the vicinity of said circuit pattern of said inner-layer circuit board, stacking said outer-layer board on an outer surface of at least one side of said inner-layer circuit board, detceting said positioning marks by scanning said wiring board assembly, with an eddy current sensor mounted exteriorly of said outer-layer board, in predetermined directions and sensing any variation in eddy current loss, roughly estimating the locations of said drilling position marks on the basis of said detected positioning marks and spot-facing the outer surface of the outer-layer board at said locations, precisely detecting one of said drilling position marks at one of said spot-faced locations by irradiating light onto said spot-faced location on one side of said assembly, monitoring a lighted image of said drilling position mark at said spot-faced location on the other side of said assembly, and indexing the center of said drilling position mark in said monitored image thereof, and drilling reference holes through the stacked boards at said drilling position marks.
Claim 3
Dependent Claim
77 words
A method according to claim 1, wherein said detection of said positioning marks is carried out by detecting the displacement and slope of two-dimensional x-y coordinates set for said inner-layer circuit board in a predetermined relative positional relation to the positioning marks with respect to two-dimensional X-Y coordinates set for said outer-layer board, and said rough estimation of said drilling position marks is carried out by indexing them with said detected displacement and slope used as parameters.
Claim 4
Dependent Claim
47 words
A method according to claim 1, wherein said detection of said positioning marks is carried out by mounting said assembly onto a two-dimensional X-Y table, and shifting said table to place a spot of the assembly corresponding to the positioning mark at a position of said spot-facing.
Claim 5
Dependent Claim
41 words
A method according to claim 1, wherein said drilling of said reference hole is performed by means of a drill mounted to a movable table, said drill being positioned directly beneath said precisely detected drilling position mark by indexing said table.
Claim 6
Dependent Claim
49 words
A method according to claim 1, wherein said drilling of said reference hole is performed by mounting said assembly onto a movable table, and moving said table to have said precisely detected drilling position mark positioned directly above a drill provided below the table for drilling said reference holes.
Claim 7
Dependent Claim
57 words
A method according to claim 1, wherein said inner-layer circuit board is further provided with a pattern of bar scales denoting positional information of said drilling position marks, said pattern being located at a position related to said drilling position marks, and said rough estimation of the marks is carried out on the basis of said pattern.
Claim 8
Dependent Claim
46 words
A method according to claim 1, wherein said inner-layer circuit board is further provided with a magnetic member at a position related to said drilling position marks, and said rough detection of the marks is carried out by detecting said magnetic member with a magnetic sensor.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-11-23 | 1991-05-25 | 1991-11-24 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-11-23 | 1995-05-25 | 1995-11-24 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-11-23 | 1999-05-25 | 1999-11-24 | $7700.00 | Window Closed / Lapsed |