← Back to Patent Explorer
US4732646A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming identically positioned alignment marks on opposite sides of a semiconductor wafer

Assignee: International Business Machines Corp
•
Filing: 1987-03-17
•
Granted: 1988-03-22
•
Expires: 2007-03-17
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A method of automatically forming identically positioned alignment marks on the front side and the back side of a silicon wafer especially prepared for use in silicon micromechanical technology. The front side and the back side of the silicon wafer are coated with an insulating layer. High-energy heavy ions are directed onto the front side insulating layer. The heavy ions penetrate the front side insulating layer, the wafer, and the back side insulating layer, thus forming single disturbed crystal lattice nuclear tracks in both insulating layers, with the wafer remaining undisturbed. The nuclear tracks in both insulating layers are etched so that corresponding identically positioned pores are opened. These pores are used as alignment marks for individual further method steps.

Inventors

  • 👤 Gerhard Elsner
  • 👤 Johann Greschner
  • 👤 Holger Hinkel

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 13:31
CPC Classifications
H; H10; H10W; H10W46/00; H10W46/501; Y; Y10; Y10S; Y10S438/00; Y10S438/975

Claims Analysis

Total Claims: 19
Claim 1
Independent Claim 132 words
A method of forming identically positioned alignment marks on front and back sides of a semiconductor wafer, characterized by coating the front and the back sides of said semiconductor wafer with an insulating layer forming front and back side insulating layers, directing high-energy heavy ions onto said front side insulating layer, said heavy ions penetrating said front side insulating layer, said semiconductor wafer and said back side insulating layer, forming single disturbed crystal lattice nuclear tracks in said front and back side insulating layers, without disturbing the crystal lattice of the semiconductor wafer, and etching said nuclear tracks in said front and back side insulating layers with corresponding, identically positioned pores being opened in said front and back side insulating layers, whereby said pores provide alignment marks for individual further method steps.
Claim 2
Independent Claim 132 words
A method of forming identically positioned alignment marks on front and back sides of a semiconductor wafer, characterized by coating the front and the back sides of said semiconductor wafer with an insulating layer forming front and back side insulating layers, directing high-energy heavy ions onto said front side insulating layer, said heavy ions penetrating said front side insulating layer, said semiconductor wafer and said back side insulating layer, forming single disturbed crystal lattice nuclear tracks in said front and back side insulating layers, without disturbing the crystal lattice of the semiconductor wafer, and etching said nuclear tracks in said front and back side insulating layers with corresponding, identically positioned pores being opened in said front and back side insulating layers, whereby said pores provide alignment marks for individual further method steps.
Claim 3
Dependent Claim 47 words
A method as set forth in claim 1 wherein said directing step includes a blanket high-energy heavy ion exposure for said front side insulating layer at such a low dose so that randomly distributed single nuclear tracks are produced in said front and back side insulating layers.
Claim 4
Dependent Claim 24 words
A method as set forth in claim 2 wherein said heavy ion exposure dose is at about 10 6 -10 7 cm -2 .
Claim 5
Dependent Claim 64 words
A method as set forth in claim 1 further including coating said front side insulating layer with a metal mask having a hole pattern defining distributed single alignment marks, and directing a blanket high-energy heavy ion exposure for said metal mask at such a high dose that nuclear tracks are produced in said front and back side insulating layers corresponding to said hole pattern.
Claim 6
Dependent Claim 22 words
A method as set forth in claim 4 wherein said heavy ion exposure dose is at about 10 9 cm -2 .
Claim 7
Dependent Claim 29 words
A method as set forth in claim 1 wherein high-energy heavy ions are Xe 24+ ions for heavy ion exposure with an energy of about 10 MeV per nucleon.
Claim 8
Dependent Claim 44 words
A method as set forth in claim 1 wherein said semiconductor wafer is made of silicon having a thickness of about 100 to 300 μm, and said insulating layers are made of silicon dioxide (SiO 2 ) having a thickness of about 100 nm.
Claim 9
Independent Claim 78 words
A method of making alignment marks which includes coating a semiconductor wafer to form front and back side insulating layers, directing high-energy heavy ions through selected locations of said front side insulating layer, said wafer and said back side insulating layer so as to form nuclear sites in the selected locations of said front and back side insulating layers, and etching said nuclear sites in said front and back side insulating layers so as to form pores therein.
Claim 10
Independent Claim 78 words
A method of making alignment marks which includes coating a semiconductor wafer to form front and back side insulating layers, directing high-energy heavy ions through selected locations of said front side insulating layer, said wafer and said back side insulating layer so as to form nuclear sites in the selected locations of said front and back side insulating layers, and etching said nuclear sites in said front and back side insulating layers so as to form pores therein.
Claim 11
Dependent Claim 22 words
A method of making alignment marks as set forth in claim 8 which further includes etching said semiconductor wafer through said pores.
Claim 12
Dependent Claim 29 words
A method of making alignment marks as set forth in claim 8 wherein said directing step includes a blanket high-energy heavy ion exposure at said front side insulating layer.
Claim 13
Dependent Claim 27 words
A method of making alignment marks as set forth in claim 8 wherein said heavy ions are directed at about 10 6 -10 7 cm -2 .
Claim 14
Dependent Claim 38 words
A method of making alignment marks as set forth in claim 8 further including forming a metal mask having a pattern of openings therein defining alignment marks and directing a blanket high-energy heavy ion exposure at said openings.
Claim 15
Dependent Claim 27 words
A method of making alignment marks as set forth in claim 12 wherein the dose of said heavy ions is at about 10 9 cm -2 .
Claim 16
Dependent Claim 30 words
A method of making alignment marks as set forth in claim 1 wherein said high-energy heavy ions are Xe 24+ ions with an energy of about 10 MeV per nucleon.
Claim 17
Dependent Claim 36 words
A method of making alignment marks as set forth in claim 1 wherein said semiconductor wafer is made of silicon and said front and back side insulating layers are made of silicon dioxide (SiO 2 ).
Claim 18
Dependent Claim 21 words
A method of making alignment marks as set forth in claim 1 wherein said etching is performed with buffered hydrofluoric acid.
Claim 19
Dependent Claim 21 words
A method of making alignment marks as set forth in claim 1 wherein said etching is performed with potassium hydroxide (KOH).

References Cited (Backward Citations)

US3802972A Cited
US3752589A Cited
US4046985A Cited
US4059480A Cited
US4131487A Cited
US4338164A Cited
US4369370A Cited
US4293374A Cited
US4318752A Cited
DE3328839A1 Cited
US4534804A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1991-03-22 1991-09-21 1992-03-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1995-03-22 1995-09-21 1996-03-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1999-03-22 1999-09-21 2000-03-22 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag