TDMA/TDM interfacing

Claim 2

A communications system comprising a time division multi-access (TDMA) system having a plurality of outstations and a nodal station, in which the said stations include a first station connected to a first user via a first time division multiplex (TDM) link and a second station connected to a second user via a second TDM link, wherein the users are assigned only certain predetermined defined slots within a TDM frame, the first station includes interface means, said interface means having a first channel map store for containing data identifying the certain predetermined defined slots, and said interface means being arranged to select from received TDM signals data from all of the said slots identified by the contents of the first channel map store and to concatenate that data with TDMA information to produce a TDMA burst, and the second station has interface means, said interface means having a second channel map store and being arranged to extract the data from the received TDMA burst, to generate a TDM frame structure and to insert the data into respective slots thereof identified by the contents of the second channel map store.

Claim 3

A communications system according to claim 1 in which the first station is an outstation and the second station is the nodal station.

Claim 4

A communications system according to claim 2 in which the defined slots in the first and second TDM links are the same slots thereby providing a transparent link between the two users.

Claim 5

A communications system according to claim 1 or 2 or claim 3 in which the TDM links are duplex links, the interface means of the second station being arranged to select from received TDM signals data from all of the said defined slots and to concatenate that data with TDMA information for inclusion in a transmission to the outstation and the interface means of the first station being arranged to extract the data from the received TDMA burst to generate a TDM frame structure and to insert the data into respective defined slots thereof.

Claim 6

A communication system according to claim 1 or 2 or 3 in which each TDM frame includes a synchronisation slot which is not a defined slot, the interface means of the second station being arranged to insert synchronisation information into the synchronisation slot.

Claim 7

A communications system according to claim 4 in which each TDM frame includes a synchronisation slot which is not a defined slot, the interface means of each station being arranged to insert synchronisation information into the synchronisation slot of the TDM frame structure generated.

Claim 8

Interface means for providing duplex interconnection between an external station operating a plurality of digital channels in a time division multiplex format and a time division multi-access (TDMA) system, wherein said interface means comprises: (a) a first channel for accepting digital signals in time division multiplex format, the first channel having a channel map store for containing data identifying certain predetermined defined slots of the TDM format, gate means responsive to the data in said channel map store for selecting the defined slots from received frames, and burst forming means for concatenating the selected slots with TDMA information to produce a burst for transmission by a TDMA system; (b) a second channel for re-constituting signals received via the TDMA system into an assigned time division multiplex format; and (c) TDMA circuitry for participating in the operation of the TDMA system, said TDMA circuitry being operatively connected to items (a) and (b) above to provide synchronisation and compatibility between the signals in said channels and the TDMA system.

Claim 9

Interface means for providing duplex interconnection between an external station operating a plurality of digital channels in a time division multiplex format and a time division multi-access (TDMA) system, wherein said interface means comprises: (a) a first channel for accepting digital signals in time division multiplex format, the first channel having a channel map store for containing data identifying certain predetermined defined slots of the TDM format, gate means responsive to the data in said channel map store for selecting the defined slots from received frames, and burst forming means for concatenating the selected slots with TDMA information to produce a burst for transmission by a TDMA system; (b) a second channel for re-constituting signals received via the TDMA system into an assigned time division multiplex format; and (c) TDMA circuitry for participating in the operation of the TDMA system, said TDMA circuitry being operatively connected to items (a) and (b) above to provide synchronisation and compatibility between the signals in said channels and the TDMA system.

Claim 10

Interface means according to claim 7, wherein the gate-means comprises a frame-counter responsive to a syncronisation slot in each frame of a received multiplexed signal wherein said frame-counter is operatively connected to (d) a buffer input gate, and (e) said channel map store, in such a manner that the frame-counter activates the buffer input gate to permit the passage of a byte when its count matches a value retained in the channel map store.

Claim 11

Interface means according to claim 7 or 8 wherein the second channel includes a reception buffer for storing received bursts, an output buffer for storing regenerated frames and frame regeneration means for transferring bytes from the reception buffer to the output buffer.

Claim 12

Interface means according to claim 9, which also includes means for incorporating blank slots in accordance with synchronisation markers contained in said received bursts to reconstitute the specified frames.

Claim 13

Interface means according to claim 9, wherein the duplex channel also includes a slot control counter operatively linked to a channel map store to control a frame gate to pass either bytes from the reception buffer to the output buffer or to pass blank slots to the output buffer and a synchronisation detector for synchronising the count of the slot control counter with synchronisation bytes provided by the reception buffer wherein said synchronisation detector is responsive to output of the frame gate.

Claim 14

Interface means according to claim 10, wherein the duplex channel also includes a slot control counter operatively linked to a channel map store to control a frame gate to pass either bytes from the reception buffer to the output buffer or to pass blank slots to the output buffer and a synchronisation detector for synchronising the count of the slot control counter with synchronisation bytes provided by the reception buffer wherein said synchronisation detector is responsive to output of the frame gate.

Claim 15

Interface means for providing duplex interconnection between an external station operating a plurality of digital channels in a time division multiplex format and a time division multi-access (TDMA) system, wherein said interface means comprises: (a) a first channel for accepting digital signals in time division multiplex format and providing said signals to a TDMA system; (b) a second channel for re-constituting signals received via the TDMA system into an assigned time division multiplex format; and (c) TDMA circuitry for participating in the operation of the TDMA system, said TDMA circuitry being operatively connected to items (a) and (b) above to provide synchronisation and compatibility between the signals in said channels and the TDMA system; said first channel comprising gate means for selecting defined slots from received frames, buffer means for storing said selected slots and burst forming means for concatenating TDMA information with the stored slots to produce a burst; said gate means comprising a frame-counter responsive to a synchronisation slot in each frame of a received multiplexed signal wherein said frame-counter is operatively connected to (d) a buffer input gate, and (e) a channel map store, in such a manner that the frame-counter activates the buffer input gate to permit the passage of a byte when its count matches a value retained in the channel map store.

Claim 16

Interface means for providing duplex interconnection between an external station operating a plurality of digital channels in a time division multiplex format and a time division multi-access (TDMA) system, wherein said interface means comprises: (a) a first channel for accepting digital signals in time division multiplex format and providing said signals to a TDMA system; (b) a second channel for re-constituting signals received via the TDMA system into an assigned time division multiplex format; and (c) TDMA circuitry for participating in the operation of the TDMA system, said TDMA circuitry being operatively connected to items (a) and (b) above to provide synchronisation and compatibility between the signals in said channels and the TDMA system; said first channel comprising gate means for selecting defined slots from received frames, buffer means for storing said selected slots and burst forming means for concatenating TDMA information with the stored slots to produce a burst; said gate means comprising a frame-counter responsive to a synchronisation slot in each frame of a received multiplexed signal wherein said frame-counter is operatively connected to (d) a buffer input gate, and (e) a channel map store, in such a manner that the frame-counter activates the buffer input gate to permit the passage of a byte when its count matches a value retained in the channel map store.

Claim 17

Interface means according to claim 13 wherein the second channel includes a reception buffer for storing received bursts, an output buffer for storing regenerated frames and frame regeneration means for transferring bytes from the reception buffer to the output buffer.

Claim 18

Interface means according to claim 14, which also includes means for incorporating blank slots in accordance with synchronisation markers contained in said received bursts to reconstitute the specified frames.

Claim 19

Interface means according to claim 14, wherein the duplex channel also includes a slot control counter operatively linked to said channel map store to control a frame gate to pass either bytes from the reception buffer to the output buffer or to pass blank slots to the output buffer and a synchronisation detector for synchronising the count of the slot control counter with synchronisation bytes provided by the reception buffer wherein said synchronisation detector is responsive to output of the frame gate.