Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
236 words
An image processing system comprising: a frame memory for storing original image data; processing means for processing said original image data in a predetermined format for display as a visual image corresponding to said original image data; a display memory for temporarily storing said processed image supplied from said processing means; display means for displaying said visual image corresponding to said processed image data read out from said display memory in response to a synchronizing signal; address signal generating means for generating a read address signal in synchronism with the synchronizing signal, and responsive to a signal representative of a position and size of a part of the displayed image on said display means; said read address signal being altered responsive to every occurrence of said synchronizing signal, for reading out at least part of the original image data stored in said frame memory, said at least part read out corresponding to said size of said part of the displayed image on said display means; and transferring means for synchronizing the reading out of said original image data from said frame memory in response to said read address signal and the writing of the image data generated from said processing means in which said read-out original data is processed and temporarily stored in said display memory so as to display the predetermined-formatted image in a corresponding location to said read address signal of said display memory.
Claim 2
Dependent Claim
236 words
An image processing system comprising: a frame memory for storing original image data; processing means for processing said original image data in a predetermined format for display as a visual image corresponding to said original image data; a display memory for temporarily storing said processed image supplied from said processing means; display means for displaying said visual image corresponding to said processed image data read out from said display memory in response to a synchronizing signal; address signal generating means for generating a read address signal in synchronism with the synchronizing signal, and responsive to a signal representative of a position and size of a part of the displayed image on said display means; said read address signal being altered responsive to every occurrence of said synchronizing signal, for reading out at least part of the original image data stored in said frame memory, said at least part read out corresponding to said size of said part of the displayed image on said display means; and transferring means for synchronizing the reading out of said original image data from said frame memory in response to said read address signal and the writing of the image data generated from said processing means in which said read-out original data is processed and temporarily stored in said display memory so as to display the predetermined-formatted image in a corresponding location to said read address signal of said display memory.
Claim 3
Dependent Claim
22 words
A system according to claim 1, wherein said processing means stores a data conversion table which is programmable by an external circuit.
Claim 4
Dependent Claim
34 words
A system according to claim 1, wherein said processing means comprises a memory for storing a value of the predetermined image data at an address corresponding to a value of the original image data.
Claim 5
Dependent Claim
32 words
A system according to claim 1, characterized by further comprising means for externally setting an area of an image corresponding to the read address signal generated by said address signal generating means.
Claim 6
Dependent Claim
18 words
A system according to claim 1, wherein said display means displays an image in accordance with non-interlaced scanning.
Claim 7
Dependent Claim
18 words
A system according to claim 1, wherein said display means displays an image in accordance with interlaced scanning.
Claim 8
Dependent Claim
20 words
A system according to claim 6, wherein said display memory comprises an even-field memory element and an odd-field memory element.
Claim 9
Dependent Claim
30 words
A system according to claim 7, wherein said address signal generating means generates an even-field address during an even-field display period and an odd-field address during an odd-field display period.