Protective tab structure for use in the fabrication of matrix addressed thin film transistor liquid crystal displays

Claim 1

A process for the fabrication of thin film field effect transistors in active matrix liquid crystal display devices, said process comprising the steps of: disposing a gate metallization layer pattern on an insulative substrate, said pattern including gate electrodes and gate drive lines; disposing a pixel electrode pattern on said insulative substrate; disposing a protective, conductive tab on a portion of at least some of said pixel electrodes; disposing a layer of protective insulative material over said gate metallization layer pattern, said pixel electrode pattern and said conductive tabs; disposing a layer of intrinsic amorphous silicon over said protective insulative material; providing a via opening through said protective, insulative layer and said intrinsic amorphous silicon to said conductive tab; disposing a source and drain metallization layer over said intrinsic amorphous silicon layer and in contact with said tab through said via opening; patterning said source and drain metallization layer, said patterning including the formation of a channel region in said source and drain metallization layer, said channel being disposed over said gate electrodes; and patterning said intrinsic amorphous silicon and said protective insulative material down to the level of said insulative substrate and said pixel electrode material so as to form thin film, field effect transistor devices associated with said pixel electrodes in said pixel electrode pattern.