US4780651A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Speed control apparatus for a motor
Assignee: Panasonic Holdings Corp
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Filing: 1987-05-13
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Granted: 1988-10-25
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Expires: 2007-05-13
Abstract
Abstract A speed control apparatus for a motor, wherein the counter-electromotive voltage is detected with great precision even when the counter-electromotive voltage to be caused from the motor driving coils is small or the ambient temperature is changed. The voltages corresponding to the detection voltages are turned into speed signals. The emitter resistance of the driving transistor, which is the cause of the torque reduction, can be removed, and uneven rotation, uneven torque is reduced. The speed control apparatus provides a composite voltage of driving coil voltages that are converted by an inversion amplifier. The voltage corresponding to the composite voltage provides the speed signal. This voltage is transferred to the driving coils and precise speed control is produced without a reduction in the controllable maximum torque or the starting torque.
Inventors
- 👤 Hiromitsu Nakano
- 👤 Masahiro Yasohara
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 07:01
CPC Classifications
H; H02; H02P; H02P6/00; H02P6/06
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
227 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils said apparatus comprising: a voltage feeder line connected to a first end of each said motor driving coil; a plurality of driving transistors connected to a second end of each said motor driving coil; a position detector for obtaining signals corresponding to the position of the rotor; current switching circuit means, responsive to the signals developed by said position detector, for sequentially switching the energization condition of said driving transistors; a plurality of inversion amplifiers, each having an inversion and a non-inversion input terminal, the respective terminal voltages of said motor driving coils being applied to the respective inversion input terminals of said inversion amplifiers, the voltage supplied by said feeder line being applied to the respective non-inversion input terminals of said inversion amplifiers, each said inversion amplifier developing a voltage difference output signal; means for developing a composite signal voltage from the composite of said voltage different output signals of said plurality of inversion amplifiers; and comparator means for developing an error signal between the composite signal voltage and a reference voltage, for amplifying the error signal and for feeding the amplified error signal to said current switching circuit means, thereby controlling the feed power of each said driving transistor to maintain the speed of the motor constant.
Claim 2
Dependent Claim
227 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils said apparatus comprising: a voltage feeder line connected to a first end of each said motor driving coil; a plurality of driving transistors connected to a second end of each said motor driving coil; a position detector for obtaining signals corresponding to the position of the rotor; current switching circuit means, responsive to the signals developed by said position detector, for sequentially switching the energization condition of said driving transistors; a plurality of inversion amplifiers, each having an inversion and a non-inversion input terminal, the respective terminal voltages of said motor driving coils being applied to the respective inversion input terminals of said inversion amplifiers, the voltage supplied by said feeder line being applied to the respective non-inversion input terminals of said inversion amplifiers, each said inversion amplifier developing a voltage difference output signal; means for developing a composite signal voltage from the composite of said voltage different output signals of said plurality of inversion amplifiers; and comparator means for developing an error signal between the composite signal voltage and a reference voltage, for amplifying the error signal and for feeding the amplified error signal to said current switching circuit means, thereby controlling the feed power of each said driving transistor to maintain the speed of the motor constant.
Claim 3
Dependent Claim
123 words
The speed controlling apparatus for a motor in accordance with claim 1, wherein the inversion input terminal of each of said inversion amplifiers is connected to an associated motor driving coil and the corresponding driving transistor through a first resistor, the non-inversion input terminal of each of said inversion amplifiers being connected with said voltage feeder line, the output terminals of each of said inversion amplifiers being operatively connected with their inversion input terminals through a second resistor to form a feedback path; and said means for developing a composite signal voltage of said voltage difference output signals being formed with each output terminal of said inversion amplifier connected in common and being connected with said voltage feeder line through a third resistor.
Claim 4
Dependent Claim
26 words
The speed control apparatus as claimed in claim 1, wherein the amplified error signal is zero when the error signal is greater than the reference voltage.
Claim 5
Dependent Claim
219 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils, the apparatus comprising: a voltage feeder line connected to one end of each motor driving coil; a plurality of driving transistors connected with the other end of each motor driving coil; a position detector for obtaining signals corresponding to the position of the rotor; current switching circuit means, responsive to the signals developed by the said position detector, for sequentially switching the energization condition of said driving transistor; speed detecting means, operatively connected to said motor, for developing a speed output signal voltage corresponding to the speed of the motor; an error amplifying circuit, responsive to the speed output signal voltage of said speed detecting means, for developing an error signal from the speed output signal voltage of said speed detecting means and a reference voltage, for amplifying the error signal and for outputting the amplified error signal; driving output composing means, operatively connected to each said driving transistor, for developing a composite signal of the outputs of each said plurality of driving transistors; and error signal transfer means, responsive to said error amplifying circuit and said driving output comprising means, for developing a drive signal output, said drive signal output being supplied to said driving transistors to drive said motor.
Claim 6
Dependent Claim
219 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils, the apparatus comprising: a voltage feeder line connected to one end of each motor driving coil; a plurality of driving transistors connected with the other end of each motor driving coil; a position detector for obtaining signals corresponding to the position of the rotor; current switching circuit means, responsive to the signals developed by the said position detector, for sequentially switching the energization condition of said driving transistor; speed detecting means, operatively connected to said motor, for developing a speed output signal voltage corresponding to the speed of the motor; an error amplifying circuit, responsive to the speed output signal voltage of said speed detecting means, for developing an error signal from the speed output signal voltage of said speed detecting means and a reference voltage, for amplifying the error signal and for outputting the amplified error signal; driving output composing means, operatively connected to each said driving transistor, for developing a composite signal of the outputs of each said plurality of driving transistors; and error signal transfer means, responsive to said error amplifying circuit and said driving output comprising means, for developing a drive signal output, said drive signal output being supplied to said driving transistors to drive said motor.
Claim 7
Dependent Claim
83 words
The speed controlling apparatus for a motor in accordance with claim 4, wherein said driving output composing means includes a plurality of resistors which are connected at one end with each output terminal of said plurality of driving transistors and are connected all in common at another end to provide the output of said driving output composing means; and wherein said error signal transfer means includes a amplifier for outputting signals to be supplied to the inputs of said plurality of driving transistors.
Claim 8
Dependent Claim
27 words
The speed control apparatus as claimed in claim 4, wherein the drive signal output is zero when the amplified error signal is greater than the reference voltage.
Claim 9
Dependent Claim
165 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils, said apparatus comprising: a speed detecting device; a feeder line connected to a first end of each said motor driving coil; a plurality of driving transistors connected with a respective second end of said driving coils; a current switching circuit sequentially energizing said driving transistors; a plurality of inversion amplifiers, each having an inversion and a non-inversion input terminal, the respective terminal voltages of said driving coils being applied to the respective inversion input terminals of said inversion amplifiers, the voltage of said feeder line being applied to the non-inversion input terminals of said inversion amplifiers, said inversion amplifiers each developing a voltage difference output signal; and means for developing a composite signal voltage from the composite of said voltage difference output signals of said plurality of inversion amplifiers by connecting the respective output terminals of the inversion amplifiers in common, thereby outputting said composite signal voltage.
Claim 10
Dependent Claim
165 words
A speed controlling apparatus for a motor having a rotor and a plurality of phase motor driving coils, said apparatus comprising: a speed detecting device; a feeder line connected to a first end of each said motor driving coil; a plurality of driving transistors connected with a respective second end of said driving coils; a current switching circuit sequentially energizing said driving transistors; a plurality of inversion amplifiers, each having an inversion and a non-inversion input terminal, the respective terminal voltages of said driving coils being applied to the respective inversion input terminals of said inversion amplifiers, the voltage of said feeder line being applied to the non-inversion input terminals of said inversion amplifiers, said inversion amplifiers each developing a voltage difference output signal; and means for developing a composite signal voltage from the composite of said voltage difference output signals of said plurality of inversion amplifiers by connecting the respective output terminals of the inversion amplifiers in common, thereby outputting said composite signal voltage.
Claim 11
Dependent Claim
108 words
The speed controlling apparatus for a motor provided with the speed detecting device in accordance with claim 7, wherein the inversion input terminals of the plurality of inversion amplifiers are respectfully connected with the connection point between the motor driving coils and the driving transistors through a first resistor, the non-inversion input terminal being operatively connected with said inversion input terminal through a second resistor; and said means for developing the composite signal voltage from the composite of said voltage difference output signals of said plurality of said inversion amplifiers by connecting the output of said means for developing to the voltage feeder line through a third resistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1991-10-25 | 1992-04-25 | 1992-10-25 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-10-25 | 1996-04-25 | 1996-10-25 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-10-25 | 2000-04-25 | 2000-10-25 | $7700.00 | Window Closed / Lapsed |