US4792534A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing a semiconductor device involving sidewall spacer formation
Assignee: Toshiba Corp
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Filing: 1986-12-15
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Granted: 1988-12-20
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Expires: 2006-12-15
Abstract
Abstract A method of manufacturing a semiconductor device having a submicron pattern. A p-type semiconductor layer is formed on an n-type semiconductor substrate. Insulating films are formed on the p-type semiconductor layer. A first mask layer, such as an aluminum layer having an etching rate different from that of the insulating films, is formed on the insulating films. A second mask layer having an etching rate different from that of the first mask layer, is formed on the first mask layer. The second mask layer is patterned. A coating film having an etching rate different from that of the first insulating film, is formed on the resultant structure. The coating film is etched to be left on a side wall of the patterned second mask layer. The first mask layer is patterned, using the residual coating film and the patterned second mask layer as masks, and a pattern finer than that of the resist is formed in the first mask layer. The insulating film is patterned, using the patterned first mask layer, and a pattern finer than that of the resist is formed in the insulating film. In the p-type semiconductor layer n+-type emitter and p+ base leading regions are formed, and the n-type semiconductor layer serves as a collector.
Inventors
- 👤 Hitoshi Tsuji
- 👤 Tiharu Kato
- 👤 Kiyoshi Takaoki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-29 11:06
CPC Classifications
H; H10; H10P; H10P76/00; H10P76/40; H10P76/408; H10P76/4085
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
141 words
A method of manufacturing a semiconductor device, comprising the steps of: forming at least one insulating film on a semiconductor body; forming a metal first mask layer on said insulating film; forming an insulating second mask layer on said first mask layer; forming a resist film on said insulating second mask layer and patterning said resist film to form a resist; patterning said insulating second mask layer by etching using said patterned resist as a mask; forming a coating film on the resultant structure; etching said coating film to be left on at least one side wall of said patterned second mask layer; patterning said metal first mask layer, by etching using the residual coating film and said patterned second mask layer as masks; and patterning said insulating film by etching, using said patterned metal first mask layer as a mask.
Claim 2
Independent Claim
141 words
A method of manufacturing a semiconductor device, comprising the steps of: forming at least one insulating film on a semiconductor body; forming a metal first mask layer on said insulating film; forming an insulating second mask layer on said first mask layer; forming a resist film on said insulating second mask layer and patterning said resist film to form a resist; patterning said insulating second mask layer by etching using said patterned resist as a mask; forming a coating film on the resultant structure; etching said coating film to be left on at least one side wall of said patterned second mask layer; patterning said metal first mask layer, by etching using the residual coating film and said patterned second mask layer as masks; and patterning said insulating film by etching, using said patterned metal first mask layer as a mask.
Claim 3
Dependent Claim
102 words
A method according to claim 1, wherein: said semiconductor body consists of a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed on said semiconductor layer of the first conductivity type, said insulating film is formed on said semiconductor layer of the second conductivity type, and said method further comprises the steps of doping an impurity in said semiconductor layer of the second conductivity type, to form an emitter region of the first conductivity type and a base leading region of the second conductivity type; and forming an emitter electrode and a base electrode.
Claim 4
Independent Claim
251 words
A method of manufacturing a μ wave transistor, comprising the steps of: preparing a semiconductor body having a semiconductor layer of a first conductivity type as a collector region, and a semi-conductor layer of a second conductivity type as a base region formed on said semiconductor layer of the first conductivity type; forming at least one first insulating layer on said semiconductor layer of the second conductivity type; forming a metal first mask layer on said first insulating layer; forming a second insulating mask layer on said metal first mask layer; forming a resist film on said second insulating layer; patterning said resist film to obtain a pattern having openings above an emitter region and a base leading region; patterning said second insulating layer, by etching using said patterned resist film as a mask; forming a third insulating layer on the resultant structure; dry-etching said third insulating layer to be left on at least one side wall of said patterned second insulating layer; patterning said metal first mask layer, by etching using the residual third insulating layer and said patterned second insulating layer as masks; patterning said first insulating layer, by etching using said patterned metal first mask layer as a mask for forming contact holes for the emitter region and the base leading region; forming the emitter region and the base leading region in said semiconductor layer of the second conductivity type; and forming an emitter electrode and a base electrode electrically contacting said emitter and base leading regions, respectively.
Claim 5
Independent Claim
251 words
A method of manufacturing a μ wave transistor, comprising the steps of: preparing a semiconductor body having a semiconductor layer of a first conductivity type as a collector region, and a semi-conductor layer of a second conductivity type as a base region formed on said semiconductor layer of the first conductivity type; forming at least one first insulating layer on said semiconductor layer of the second conductivity type; forming a metal first mask layer on said first insulating layer; forming a second insulating mask layer on said metal first mask layer; forming a resist film on said second insulating layer; patterning said resist film to obtain a pattern having openings above an emitter region and a base leading region; patterning said second insulating layer, by etching using said patterned resist film as a mask; forming a third insulating layer on the resultant structure; dry-etching said third insulating layer to be left on at least one side wall of said patterned second insulating layer; patterning said metal first mask layer, by etching using the residual third insulating layer and said patterned second insulating layer as masks; patterning said first insulating layer, by etching using said patterned metal first mask layer as a mask for forming contact holes for the emitter region and the base leading region; forming the emitter region and the base leading region in said semiconductor layer of the second conductivity type; and forming an emitter electrode and a base electrode electrically contacting said emitter and base leading regions, respectively.
Claim 6
Independent Claim
97 words
A method of manufacturing a semiconductor device, comprising the steps of: forming at least one first insulating layer on a semiconductor body; forming a metal layer on said first insuating layer; forming a second insulating layer on said metal layer; forming a resist layer on said second insulating layer; patterning said resist layer to obtain a pattern; etching said second insulating layer, using said patterned resist layer as a mask; etching said metal layer, using said etched second insulating layer as a mask; and etching said first insulating layer, using said etched metal layer as a mask.
Claim 7
Independent Claim
97 words
A method of manufacturing a semiconductor device, comprising the steps of: forming at least one first insulating layer on a semiconductor body; forming a metal layer on said first insuating layer; forming a second insulating layer on said metal layer; forming a resist layer on said second insulating layer; patterning said resist layer to obtain a pattern; etching said second insulating layer, using said patterned resist layer as a mask; etching said metal layer, using said etched second insulating layer as a mask; and etching said first insulating layer, using said etched metal layer as a mask.
Claim 8
Independent Claim
306 words
A method of manufacturing a semiconductor device, comprising the steps of: preparing a semiconductor body having a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed on said semiconductor layer of the first conductivity type; forming at least one insulating film on said semiconductor substrate of the second conductivity type; forming a first mask layer consisting essentially of a metal on said at least one insulating film; forming an insulating second mask layer on said metal first mask layer; forming a resist film on said insulating second mask layer; patterning said resist film to form a resist; patterning said insulating second mask layer by dry etching said insulating second mask layer using said resist as a mask; removing said resist; forming an insulating coating film on the resultant structure; dry etching said insulating coating film to leave the insulating coating film as a residual film on at least one side wall of said patterned insulating second mask layer; patterning said metal first mask layer by dry etching said metal first mask layer using said patterned insulating second mask layer and said residual insulating coating film as a mask; removing said patterned insulating second mask layer and said residual insulating coating film; patterning said at least one insulating film by dry etching said at least one insulating film using said patterned metal first mask layer as a mask; removing said patterned metal first mask layer; doping an impurity of the first conductivity type to form an emitter region and of the second conductivity type to form a base-leading region, into said semiconductor layer of the second conductivity type, using said patterned at least one insulating film as a mask; and forming an emitter electrode connected to the emitter region and a base electrode connected to the base leading region.
Claim 9
Independent Claim
306 words
A method of manufacturing a semiconductor device, comprising the steps of: preparing a semiconductor body having a semiconductor layer of a first conductivity type and a semiconductor layer of a second conductivity type formed on said semiconductor layer of the first conductivity type; forming at least one insulating film on said semiconductor substrate of the second conductivity type; forming a first mask layer consisting essentially of a metal on said at least one insulating film; forming an insulating second mask layer on said metal first mask layer; forming a resist film on said insulating second mask layer; patterning said resist film to form a resist; patterning said insulating second mask layer by dry etching said insulating second mask layer using said resist as a mask; removing said resist; forming an insulating coating film on the resultant structure; dry etching said insulating coating film to leave the insulating coating film as a residual film on at least one side wall of said patterned insulating second mask layer; patterning said metal first mask layer by dry etching said metal first mask layer using said patterned insulating second mask layer and said residual insulating coating film as a mask; removing said patterned insulating second mask layer and said residual insulating coating film; patterning said at least one insulating film by dry etching said at least one insulating film using said patterned metal first mask layer as a mask; removing said patterned metal first mask layer; doping an impurity of the first conductivity type to form an emitter region and of the second conductivity type to form a base-leading region, into said semiconductor layer of the second conductivity type, using said patterned at least one insulating film as a mask; and forming an emitter electrode connected to the emitter region and a base electrode connected to the base leading region.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1991-12-20 | 1992-06-20 | 1992-12-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1995-12-20 | 1996-06-20 | 1996-12-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1999-12-20 | 2000-06-20 | 2000-12-20 | $7700.00 | Window Closed / Lapsed |