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US4802952A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for manufacturing semiconductor absolute pressure sensor units

Assignee: Hitachi Ltd
•
Filing: 1988-02-22
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Granted: 1989-02-07
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Expires: 2008-02-22
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Abstract

Abstract A method for manufacturing semiconductor absolute pressure sensor units includes anodically bonding a silicon sensor wafer (10) and a silicon cap wafer (12) with a borosilicate glass layer (32) disposed therebetween so as to surround respective sensor chips on the silicon sensor wafer (10) by introducing a matrix shaped conductive layer (28) in contact with and in alignment with the borosilicate glass layer (32), the matrix shaped conductive layer (28) is used as a negative electrode during anodic bonding operation so that a high bonding strength is obtained and sodium ions contained in the borosilicate glass layer (32) are kept away from bond regions after completing the anodically bonding operation.

Inventors

  • 👤 Shigeyuki Kobori
  • 👤 Kazuji Yamada
  • 👤 Ryoichi Kobayashi
  • 👤 Atsushi Miyazaki
  • 👤 Seikou Suzuki

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 13:01
CPC Classifications
G; G01; G01L; G01L9/00; G01L9/0041; G01L9/0042; H; H10; H10D; H10D48/00; H10D48/50; H10N; H10N30/00; H10N30/01; H10N39/00; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49082; Y10T29/49103

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 481 words
A method for manufacturing semiconductor absolute pressure sensor units comprising: a step of preparing a semiconductor sensor wafer (10) of one conductivity type having a plurality of first recesses (34) formed on one surface thereof in matrix so as to constitute diaphragms (36), thick boundary area supporting and surrounding the first recesses (34), a plurality of piezoresistive elements (14, 16) of the other conductivity type formed on the other surface of the semiconductor sensor wafer (10) at the respective diaphragms (36), first conductive layer (24) forming a bridge circuit with the piezoresistive elements (14,16) at the respective diaphragms (36) and input and output terminals (26) therefor disposed on the thick boundary area of the respective diaphragms (36), glass layer (32) containing movable ions therein formed in matrix on the other surface of the semiconductor sensor wafer (10) over the thick boundary area, and second conductive strip layer (28) formed in contact with and in alignment with the glass layer (32); a step of preparing a semiconductor cap wafer (12) of substantially the same thermal expansion coefficient as that of the semiconductor sensor wafer (10) having a plurality of second recesses (44) formed on one surface thereof in matrix, a plurality of first and second channels (46, 47) formed on the one surface in matrix adjacent to the second recesses (44) arranged in matrix, and cutting marks (48, 50, 52) formed on the other surface of the semiconductor cap wafer (12); a step of aligning the semiconductor cap wafer (12) on the semiconductor sensor wafer (10) in such a manner that the second recesses (44) of the semiconductor cap wafer (12) overlie the respective diaphragms (36) of the semiconductor sensor wafer (10) from the other surface thereof so as to constitute reference pressure chambers (38) for the respective absolute pressure sensor units, the columns of the first channels (46) of the semiconductor cap wafer (12) overlie the input and output terminals (26) of the respective first conductive layers (24) and the columns of the second conductive strip layer (28) and the rows of the second channels (47) overlie the rows of the second conductive strip layer (28); a step of applying a DC voltage between the semiconductor cap wafer (12) and the second conductive strip layer (28) on the semiconductor sensor wafer (10) in such a manner that the semiconductor cap wafer (12) is applied a positive potential and the second conductive strip layer (28) is applied a negative potential so as to bond the semiconductor cap wafer (12) to the semiconductor sensor wafer (10) with the glass layer (32) containing movable ions through anodic bonding process; and a step of cutting the bonded semiconductor cap wafer (12) and semiconductor sensor wafer (10) along the cutting marks (48, 50, 52) on the other surface of the semiconductor cap wafer (12) so as to produce a plurality of semiconductor absolute pressure sensor units.
Claim 2
Independent Claim 481 words
A method for manufacturing semiconductor absolute pressure sensor units comprising: a step of preparing a semiconductor sensor wafer (10) of one conductivity type having a plurality of first recesses (34) formed on one surface thereof in matrix so as to constitute diaphragms (36), thick boundary area supporting and surrounding the first recesses (34), a plurality of piezoresistive elements (14, 16) of the other conductivity type formed on the other surface of the semiconductor sensor wafer (10) at the respective diaphragms (36), first conductive layer (24) forming a bridge circuit with the piezoresistive elements (14,16) at the respective diaphragms (36) and input and output terminals (26) therefor disposed on the thick boundary area of the respective diaphragms (36), glass layer (32) containing movable ions therein formed in matrix on the other surface of the semiconductor sensor wafer (10) over the thick boundary area, and second conductive strip layer (28) formed in contact with and in alignment with the glass layer (32); a step of preparing a semiconductor cap wafer (12) of substantially the same thermal expansion coefficient as that of the semiconductor sensor wafer (10) having a plurality of second recesses (44) formed on one surface thereof in matrix, a plurality of first and second channels (46, 47) formed on the one surface in matrix adjacent to the second recesses (44) arranged in matrix, and cutting marks (48, 50, 52) formed on the other surface of the semiconductor cap wafer (12); a step of aligning the semiconductor cap wafer (12) on the semiconductor sensor wafer (10) in such a manner that the second recesses (44) of the semiconductor cap wafer (12) overlie the respective diaphragms (36) of the semiconductor sensor wafer (10) from the other surface thereof so as to constitute reference pressure chambers (38) for the respective absolute pressure sensor units, the columns of the first channels (46) of the semiconductor cap wafer (12) overlie the input and output terminals (26) of the respective first conductive layers (24) and the columns of the second conductive strip layer (28) and the rows of the second channels (47) overlie the rows of the second conductive strip layer (28); a step of applying a DC voltage between the semiconductor cap wafer (12) and the second conductive strip layer (28) on the semiconductor sensor wafer (10) in such a manner that the semiconductor cap wafer (12) is applied a positive potential and the second conductive strip layer (28) is applied a negative potential so as to bond the semiconductor cap wafer (12) to the semiconductor sensor wafer (10) with the glass layer (32) containing movable ions through anodic bonding process; and a step of cutting the bonded semiconductor cap wafer (12) and semiconductor sensor wafer (10) along the cutting marks (48, 50, 52) on the other surface of the semiconductor cap wafer (12) so as to produce a plurality of semiconductor absolute pressure sensor units.
Claim 3
Dependent Claim 28 words
A method for manufacturing semiconductor absolute pressure sensor units according to claim 1, wherein first conductive layer (24) and the second conductive strip layer (28) are formed simultaneously.
Claim 4
Dependent Claim 28 words
A method for manufacturing semiconductor absolute pressure sensor units according to claim 1, wherein the second conductive strip layer (28) is substantially cut away during said cutting step.
Claim 5
Dependent Claim 39 words
A method for manufacturing semiconductor absolute pressure sensor units according to claim 1, wherein the second conductive strip layer (28) is provided with terminals (30) for the DC voltage application at the periphery of the semiconductor sensor wafer (10).

References Cited (Backward Citations)

US3918019A Cited
US4291293A Cited
JPS6120473A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-02-07 1992-08-08 1993-02-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-02-07 1996-08-08 1997-02-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-02-07 2000-08-08 2001-02-07 $7700.00 Window Closed / Lapsed

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