US4806748A
Expired / Lapsed
US
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Photo-electric conversion circuit
Assignee: Pentax Corp
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Filing: 1987-06-23
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Granted: 1989-02-21
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Expires: 2007-06-23
Abstract
Abstract A photoelectric amplifier comprising a photodiode having an anode connected to a gate of a first FET and a cathode connected to a gate of a second FET, with the second FET having a source-gate interconnection so as to be self-biasing. The photodiode cathode is connected to a high impedance feedback loop, including an output transistor, which is connected back to the photodiode anode. In a preferred embodiment, further included is a feedback circuit gain controlling transistor having a base driven by the feedback circuit and a current electrode connected to the source of the first FET.
Inventors
- 👤 Satoshi Takami
- 👤 Yutaka Ohsawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:29
CPC Classifications
G; G01; G01J; G01J1/00; G01J1/42; G01J1/44; H; H03; H03F; H03F3/00; H03F3/04; H03F3/08; H03F3/082; G01J2001/4446; G01J2001/446
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
118 words
A photoelectric conversion circuit, comprising: first transistor means; self-biased second transistor means; photodiode means connected between gates of said first and second transistor means by having an anode connected to a gate electrode of said first transistor means and a cathode connected to a gate electrode of said second transistor means; and means for controlling a drain current of said second transistor means to a predetermined value, whereby said predetermined value of drain current causes said photodiode mans to be biased in one of a first and second state, wherein in a first state said photodiode means is based slightly in a reverse direction, and in a second state said photodiode means is biased in a short-circuit state.
Claim 2
Dependent Claim
118 words
A photoelectric conversion circuit, comprising: first transistor means; self-biased second transistor means; photodiode means connected between gates of said first and second transistor means by having an anode connected to a gate electrode of said first transistor means and a cathode connected to a gate electrode of said second transistor means; and means for controlling a drain current of said second transistor means to a predetermined value, whereby said predetermined value of drain current causes said photodiode mans to be biased in one of a first and second state, wherein in a first state said photodiode means is based slightly in a reverse direction, and in a second state said photodiode means is biased in a short-circuit state.
Claim 3
Dependent Claim
26 words
A photoelectric conversion circuit as recited in claim 1, further comprising second means for controlling a sum of drain currents of said first and second transistors.
Claim 4
Dependent Claim
61 words
A photoelectric conversion circuit as recited in claim 2, comprising: third transistor means connected to said gate of said first transistor means; a feedback circuit for providing a feedback path between a collector and base of said third transistor means, wherein said feedback circuit comprises said first and second transistor means, and a fourth transistor means driven by a constant current.
Claim 5
Dependent Claim
37 words
A photoelectric conversion circuit as recited in claim 3, wherein fifth means is connected to a drain of said first transistor means, for maintaining a drain-to-source voltage of said first transistor means at substantially a predetermined value.
Claim 6
Dependent Claim
55 words
A photoelectric conversion circuit as recited in claim 1, wherein a drain of said second transistor means controls an output of said photoelectric conversion circuit, and wherein fifth transistor means is connected to a drain of said first transistor means, for maintaining a drain-to-source voltage of said first transistor means at substantially a predetermined value.
Claim 7
Dependent Claim
142 words
A photoelectric conversion circuit, comprising: first transistor means; self-biased second transistor means; photodiode means connected between gates of said first and second transistor means by having an anode connected to a gate electrode of said first transistor means and a cathode connected to a gate electrode of said second transistor means; means for controlling a drain current of said second transistor means to a predetermined value, whereby said predetermined value of drain current causes said photodiode means to biased in one of a first and second state, wherein in a first state said photodiode means is biased slightly in a reverse direction, and in a second state said photodiode means is biased in a short-circuit state; and gain controlling means connected between the drain of said first and second transistors, for suppressing a variation of a drain-source voltage of said first transistor.
Claim 8
Dependent Claim
142 words
A photoelectric conversion circuit, comprising: first transistor means; self-biased second transistor means; photodiode means connected between gates of said first and second transistor means by having an anode connected to a gate electrode of said first transistor means and a cathode connected to a gate electrode of said second transistor means; means for controlling a drain current of said second transistor means to a predetermined value, whereby said predetermined value of drain current causes said photodiode means to biased in one of a first and second state, wherein in a first state said photodiode means is biased slightly in a reverse direction, and in a second state said photodiode means is biased in a short-circuit state; and gain controlling means connected between the drain of said first and second transistors, for suppressing a variation of a drain-source voltage of said first transistor.
Claim 9
Dependent Claim
26 words
A photoelectric conversion circuit as recited in claim 6, further comprising second means for controlling a sum of drain currents of said first and second transistors.
Claim 10
Dependent Claim
62 words
A photoelectric conversion circuit as recited in claim 7, comprising: third transistor means connected to said gate of said first transistor means: and a feedback circuit for providing a feedback path between a collector and base of said third transistor means, wherein said feedback circuit comprises said first and second transistor means, and a fourth transistor means driven by a constant current.
Claim 11
Dependent Claim
55 words
A photoelectric conversion circuit as recited in claim 6, wherein a drain of said second transistor means controls an output of said photoelectric conversion circuit, and wherein compression transistor means is connected to a drain of said first transistor means, for maintaining a drain-to-source voltage of said first transistor means at substantially a predetermined value.
Claim 12
Dependent Claim
35 words
A photoelectric conversion circuit as recited in claim 9, wherein said gain controlling means suppresses a variation of a drain-source voltage of said first transistor according to a compression voltage of said compression transistor means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-02-21 | 1992-08-22 | 1993-02-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-02-21 | 1996-08-22 | 1997-02-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-02-21 | 2000-08-22 | 2001-02-21 | $7700.00 | Window Closed / Lapsed |