US4810975A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Random number generator using sampled output of variable frequency oscillator
Assignee: Dallas Semiconductor Corp
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Filing: 1987-08-10
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Granted: 1989-03-07
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Expires: 2007-08-10
Abstract
Abstract A random number generator designed for use with an electronic key uses a triangular output analog oscillator to vary the frequency of a higher frequency voltage controlled oscillator. The output of the voltage controlled oscillator is sampled at a rate much less than the rate of oscillation of the voltage controlled oscillator to produce random digital values.
Inventors
- 👤 Donald R. Dias
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 04:32
CPC Classifications
G; G06; G06F; G06F7/00; G06F7/58; G06F7/588; H; H03; H03K; H03K3/00; H03K3/02; H03K3/023; H03K3/0231; H03K3/027; H03K3/03; H03K3/0315; H03K3/0322; H03K3/84
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
105 words
Apparatus for generating a digital signal, comprising: (a) a first voltage generating means for generating a time-varying voltage at a voltage node; (b) a variable frequency oscillator means coupled to said first voltage generating means for generating an oscillating signal wherein the frequency of said variable frequency oscillator means varies in response to the voltage at said voltage node; and (c) sampling means coupled to said variable frequency oscillating means for sampling said oscillating signal of said variable frequency oscillator means at a rate which is independent of the oscillation frequency of said variable frequency oscillator means, said sampling means providing a digital signal output.
Claim 2
Dependent Claim
105 words
Apparatus for generating a digital signal, comprising: (a) a first voltage generating means for generating a time-varying voltage at a voltage node; (b) a variable frequency oscillator means coupled to said first voltage generating means for generating an oscillating signal wherein the frequency of said variable frequency oscillator means varies in response to the voltage at said voltage node; and (c) sampling means coupled to said variable frequency oscillating means for sampling said oscillating signal of said variable frequency oscillator means at a rate which is independent of the oscillation frequency of said variable frequency oscillator means, said sampling means providing a digital signal output.
Claim 3
Dependent Claim
25 words
The apparatus of claim 1 wherein the frequency of said variable frequency oscillator means is much greater than the sampling rate of said sampling means.
Claim 4
Dependent Claim
15 words
The apparatus of claim 1 wherein said first voltage generating means generates a triangular waveform.
Claim 5
Dependent Claim
44 words
The apparatus of claim 1 wherein said first voltage generating means comprises an oscillator having a period for one oscillation that is approximately equal to the time required for said apparatus to generate a predetermined number of signal bits at said digital signal output.
Claim 6
Dependent Claim
15 words
The apparatus of claim 1 wherein said variable frequency oscillator means comprises a ring oscillator.
Claim 7
Dependent Claim
31 words
The apparatus of claim 1 wherein said sampling means samples said output of said variable frequency oscillator means at a rate determined by an output line of a central processing unit.
Claim 8
Dependent Claim
117 words
A random number generating circuit for use in an electronic key comprising: (a) a first oscillator having a triangular wave form at its output terminal; (b) a ring oscillator coupled to the output of said first oscillator wherein the frequency of said ring oscillator is dependant on the output voltage of said first oscillator, said ring oscillator having a period of oscillation of N; and (c) a D latch having a D input coupled to the output of said ring oscillator and for generating at its Q output a serial bit stream which is an essentially random digital number, said D latch being clocked by a signal derived from the output line of a central processing unit.
Claim 9
Dependent Claim
117 words
A random number generating circuit for use in an electronic key comprising: (a) a first oscillator having a triangular wave form at its output terminal; (b) a ring oscillator coupled to the output of said first oscillator wherein the frequency of said ring oscillator is dependant on the output voltage of said first oscillator, said ring oscillator having a period of oscillation of N; and (c) a D latch having a D input coupled to the output of said ring oscillator and for generating at its Q output a serial bit stream which is an essentially random digital number, said D latch being clocked by a signal derived from the output line of a central processing unit.
Claim 10
Independent Claim
63 words
A method for generating random numbers comprising the steps of: (a) generating a time-varying voltage; (b) generating a variable frequency oscillating signal in which the frequency of said variable frequency oscillating signal is controlled by said time-varying voltage; and (c) sampling said variable frequency oscillating signal at a sampling rate independent of said time-varying voltage and independent of said variable frequency oscillating signal.
Claim 11
Independent Claim
63 words
A method for generating random numbers comprising the steps of: (a) generating a time-varying voltage; (b) generating a variable frequency oscillating signal in which the frequency of said variable frequency oscillating signal is controlled by said time-varying voltage; and (c) sampling said variable frequency oscillating signal at a sampling rate independent of said time-varying voltage and independent of said variable frequency oscillating signal.
Claim 12
Dependent Claim
30 words
The method set forth in claim 8 wherein the highest frequency of said time-varying voltage and said sampling are less than the lowest frequency of said variable frequency oscillating signal.
References Cited (Backward Citations)
US4001817A
Cited
US4644299A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-03-06 | 1992-09-05 | 1993-03-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-03-06 | 1996-09-05 | 1997-03-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-03-06 | 2000-09-05 | 2001-03-07 | $7700.00 | Window Closed / Lapsed |