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US4829197A Expired / Lapsed US ⏱️ 0.0 years remaining

Driver circuit with boost and feedback portions for improving output risetime and reducing propagation delay

Assignee: Motorola Solutions Inc
•
Filing: 1988-03-25
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Granted: 1989-05-09
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Expires: 2008-03-25
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Abstract

Abstract A driver circuit for driving capacitive loads comprises a regenerative high side driver and a low side driver. A boost circuit responsive to an input signal turns the regenerative high side driver on hard producing a very fast output rise time. A feedback circuit is provided which disables the boost circuit when the output voltage reaches a predetermined value conserving supply current. A sustaining resistor provides base current to maintain the high side driver on after the feedback circuit has disabled the boost circuit.

Inventors

  • 👤 Eric W. Tisinger

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 07:29
CPC Classifications
H; H03; H03K; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/66; H03K17/665; H03K17/666; H03K17/04; H03K17/041; H03K17/0412; H03K17/04126

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 124 words
A driver circuit, comprising: an output node; means coupled to said node and responsive to a first input signal for reducing the voltage of said output node; regenerative means coupled to said output node and responsive to a boost current for increasing the voltage of said output node; a boost circuit responsive to a second input signal and coupled to said regenerative means for providing said boost current to said regenerative means; feedback means coupled to said output node and to said boost circuit for disabling said boost circuit when the voltage at said output node reaches a predetermined value; and said feedback means including sustaining means for maintaining said regenerative means on after said boost circuit has been disabled by said feedback means.
Claim 2
Dependent Claim 124 words
A driver circuit, comprising: an output node; means coupled to said node and responsive to a first input signal for reducing the voltage of said output node; regenerative means coupled to said output node and responsive to a boost current for increasing the voltage of said output node; a boost circuit responsive to a second input signal and coupled to said regenerative means for providing said boost current to said regenerative means; feedback means coupled to said output node and to said boost circuit for disabling said boost circuit when the voltage at said output node reaches a predetermined value; and said feedback means including sustaining means for maintaining said regenerative means on after said boost circuit has been disabled by said feedback means.
Claim 3
Dependent Claim 68 words
A driver circuit according to claim 1 wherein said regenerative means comprises: an NPN output transistor having an emitter coupled to said output node and having base and collector terminals; and a PNP transistor having a collector coupled to the base of said output transistor, an emitter coupled to the collector of said output transistor and a base coupled to said boost circuit and to said sustaining means.
Claim 4
Dependent Claim 94 words
A driver circuit according to claim 2 wherein said boost circuit comprises: a first transistor having a base terminal coupled to receive said second signal, a collector terminal for coupling to a first source of supply voltage, and having an emitter terminal; a second transistor having a base terminal coupled to the emitter terminal of said first transistor, an emitter terminal for coupling to a second source of supply voltage, and having a collector terminal; and first resistive means coupled between the collector of said second transistor and the base of said PNP transistor.
Claim 5
Dependent Claim 73 words
A driver circuit according to claim 3 wherein said feedback means comprises: a resistive divider network coupled to said output node; a third transistor having a base coupled to said resistive divider network, an emitter for coupling to said second source of supply voltage and having a collector; and diode means having an anode coupled to the base of said first transistor and a cathode coupled to the collector of said third transistor.
Claim 6
Dependent Claim 30 words
A driver circuit according to claim 4 wherein said sustaining means comprises second resistive means coupled between the collector of said third transistor and the base of said PNP transistor.
Claim 7
Dependent Claim 71 words
A driver circuit according to claim 5 wherein said first means comprises: a fourth transistor having a base for receiving said first input signal, an emitter for coupling to said second source of supply voltage and a collector coupled to the base of said output transistor; and second diode means having an anode coupled to the said output node and having a cathode coupled to the collector of said fourth transistor.
Claim 8
Dependent Claim 17 words
A driver circuit according to claim 6 wherein said first and second input signals are complementary signals.

References Cited (Backward Citations)

US3867644A Cited
US4321490A Cited
US4701631A Cited
US4698519A Cited
US4739190A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-05-08 1992-11-07 1993-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-05-08 1996-11-07 1997-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-05-08 2000-11-07 2001-05-09 $7700.00 Window Closed / Lapsed

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