Circuit and method for page addressing read only memory

Claim 1

A circuit for expanding computer read-only memory having N binary address lines for addressing 2 N addresses, the read-only memory receiving N system address lines from the computer, comprising: expanded read-only memory means for replacing the read-only memory, said expanded read-only memory means having Y binary address lines for storing information in 2 Y addresses, where Y is greater than N; and, address signal generator means for receiving the N system address lines from the computer and providing sufficient additional binary address lines to said expanded read-only memory means for addressing said 2 Y addresses, wherein said expanded read-only memory means is addressed in page increments and prechosen system addresses select specific pages, and wherein said address signal generator means includes address line generator means for providing said additional binary address lines, said address line generator means receiving the number of system address lines sufficient for selection of the number of said page increments, and decoder means for detecting the presence of said prechosen addresses and which page is selected, said decoder means receiving a plurality of the system address lines, said decoder means including page select decoder means for detecting the presense of said prechosen addresses, said page select decoder means receiving a plurality of the system address lines and generating an output signal indicative of receipt of one of said prechosen addresses, and default page selector means for toggling said additional binary address lines between the current selected page and a default page, said default page selector means receiving the most significant of the N system address lines.