US4833471A
Expired / Lapsed
US
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Data processing apparatus
Assignee: Canon Inc
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Filing: 1986-11-17
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Granted: 1989-05-23
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Expires: 2006-11-17
Abstract
Abstract There is provided a data processing apparatus for encoding or decoding binary data such as a magnetic disk or an optical disk in which a binary data sequence is converted to a binary code sequence which is suitable for a data processes. This data processing apparatus comprises: a code converter for converting the m-bit data in the binary data sequence to the n-bit code corresponding thereto; output means for outputting the n-bit code sequence corresponding to the binary data sequence; and DC-freeing means for restricting the DC component of the code sequence which is outputted from the output means. The code converter has a ROM table to store the data for code conversion and a register for converting the m-bit serial data to the parallel data and can be easily constituted by a programmable array logic.
Inventors
- 👤 Yoshihiro Tokuume
- 👤 Shigeo Tsujii
- 👤 Kaoru Kurosawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 04:41
CPC Classifications
H; H03; H03M; H03M5/00; H03M5/02; H03M5/04; H03M5/14; H03M5/145
Claims Analysis
Total Claims: 19
Claim 1
Independent Claim
272 words
Data processing apparatus for converting m-bit input data into n-bit output data, comprising: input means for inputting m-bit data of a binary data sequence; converting means for converting the m-bit data into n-bit data, said converting means including: (i) first means for judging whether a polarity of accumulated charges of a code row comprising at least one n-bit code coincides with a polarity of accumulated charges of another n-bit code to be connected to said code row, wherein one bit on each extremity of each n-bit code is fixed and said n-bit code is obtained in response to the m-bit data where (m<n); (ii) second means for controlling inversion and non-inversion of said extremity bits of said other n-bit code in response to the judgement made by said first means and a parity of said code row; (iii) third means for calculating accumulated charges of a new code row including said code row and said other n-bit code in response to said accumulated charges of said code row, charges of said other n-bit code and the judgement made by said first means; and (iv) fourth means for deriving parity of said new code row in response to parity of said other n-bit code controlled by said second means and said parity of said code row wherein operations of said four means are repeated in response to the polarity of accumulated charges of said new code row obtained by said third means and said parity of said new code row obtained by said fourth means; and (v) output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 2
Dependent Claim
272 words
Data processing apparatus for converting m-bit input data into n-bit output data, comprising: input means for inputting m-bit data of a binary data sequence; converting means for converting the m-bit data into n-bit data, said converting means including: (i) first means for judging whether a polarity of accumulated charges of a code row comprising at least one n-bit code coincides with a polarity of accumulated charges of another n-bit code to be connected to said code row, wherein one bit on each extremity of each n-bit code is fixed and said n-bit code is obtained in response to the m-bit data where (m<n); (ii) second means for controlling inversion and non-inversion of said extremity bits of said other n-bit code in response to the judgement made by said first means and a parity of said code row; (iii) third means for calculating accumulated charges of a new code row including said code row and said other n-bit code in response to said accumulated charges of said code row, charges of said other n-bit code and the judgement made by said first means; and (iv) fourth means for deriving parity of said new code row in response to parity of said other n-bit code controlled by said second means and said parity of said code row wherein operations of said four means are repeated in response to the polarity of accumulated charges of said new code row obtained by said third means and said parity of said new code row obtained by said fourth means; and (v) output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 3
Dependent Claim
17 words
Data processing apparatus according to claim 1, wherein a head bit of said n-bit code is fixed.
Claim 4
Dependent Claim
26 words
Data processing apparatus according to claim 1, wherein operations of said four converting means are repeated in response to the number of said input m-bit data.
Claim 5
Dependent Claim
13 words
Data processing apparatus according to claim 1, wherein said code row is DC-freed.
Claim 6
Dependent Claim
209 words
A data processing device for converting 8-bit input data into 10-bit output data, comprising: input means for inputting 8-bit data of a binary data sequence; converting means for converting the 8-bit data into 10-bit data, said converting means including: (i) first means for judging whether or not a polarity of accumulated charges of a code row comprising at least one 10-bit code coincides with a polarity of accumulated charges of a next 10-bit code to be connected to said code row, wherein a first bit of each 10-bit code is fixed and each 10-bit code is obtained in response to the 8-bit data; (ii) second means for controlling inversion/non-inversion of said first bit of said next 10-bit code in response to the judgement made by said first means and a parity of said code row; and (iii) third means for calculating accumulated charges of a new code now including said code row and said next 10-bit code in response to said accumulated charges of said code row, charges of the next 10-bit code and the judgement made by said first means whereby operations of said three converting means are repeated as necessary; and output means for outputting a sequence of said 10-bit codes corresponding to said binary data sequence.
Claim 7
Dependent Claim
209 words
A data processing device for converting 8-bit input data into 10-bit output data, comprising: input means for inputting 8-bit data of a binary data sequence; converting means for converting the 8-bit data into 10-bit data, said converting means including: (i) first means for judging whether or not a polarity of accumulated charges of a code row comprising at least one 10-bit code coincides with a polarity of accumulated charges of a next 10-bit code to be connected to said code row, wherein a first bit of each 10-bit code is fixed and each 10-bit code is obtained in response to the 8-bit data; (ii) second means for controlling inversion/non-inversion of said first bit of said next 10-bit code in response to the judgement made by said first means and a parity of said code row; and (iii) third means for calculating accumulated charges of a new code now including said code row and said next 10-bit code in response to said accumulated charges of said code row, charges of the next 10-bit code and the judgement made by said first means whereby operations of said three converting means are repeated as necessary; and output means for outputting a sequence of said 10-bit codes corresponding to said binary data sequence.
Claim 8
Dependent Claim
28 words
A data processing device according to claim 5, wherein said operations of said three converting means are repeated in response to the number of said input 8-bit data.
Claim 9
Dependent Claim
14 words
A data processing device according to claim 5, wherein said code row is DC-freed.
Claim 10
Dependent Claim
56 words
A data processing device according to claim 5, wherein a number of successive 0's in said 10-bit code is equal to or less than 2 and even if 1 at the first bit of said 10-bit code is executed inversion/non-inversion, the number of successive 0's in said code row is equal to or less than 5.
Claim 11
Dependent Claim
189 words
A data processing apparatus for converting m-bit input data into n-bit output data, comprising: input means for inputting m-bit data of a binary data sequence; converting means for converting the m-bit data into n-bit codes where (n>m), said converting means including a converting table for storing a plurality of n-bit codes, and for converting each of the m-bit data into a different one of the n-bit codes, wherein the first bit of each of said n-bit codes stored in said converting table is fixed; control means for controlling inversion/non-inversion of said first bit in order to utilize said first bit of said n-bit codes as a connecting bit, by judging each of accumulated charges of at least a code row and a next n-bit code, when said next n-bit code is added to said code row, said code row comprising one or more of said n-bit codes which are converted by said converting means and correspond to each of a plurality of said input m-bit data to form a new code row; and output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 12
Dependent Claim
189 words
A data processing apparatus for converting m-bit input data into n-bit output data, comprising: input means for inputting m-bit data of a binary data sequence; converting means for converting the m-bit data into n-bit codes where (n>m), said converting means including a converting table for storing a plurality of n-bit codes, and for converting each of the m-bit data into a different one of the n-bit codes, wherein the first bit of each of said n-bit codes stored in said converting table is fixed; control means for controlling inversion/non-inversion of said first bit in order to utilize said first bit of said n-bit codes as a connecting bit, by judging each of accumulated charges of at least a code row and a next n-bit code, when said next n-bit code is added to said code row, said code row comprising one or more of said n-bit codes which are converted by said converting means and correspond to each of a plurality of said input m-bit data to form a new code row; and output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 13
Dependent Claim
40 words
A data processing apparatus according to claim 9, wherein said control means is repeatedly operated such that a new n-bit code row including said n-bit code row and said next n-bit code is added to a further next n-bit code.
Claim 14
Dependent Claim
14 words
A data processing apparatus according to claim 9, wherein said code row is DC-freed.
Claim 15
Dependent Claim
29 words
A data processing apparatus according to claim 9, wherein said converting table is stored in an ROM and the first bit of each of said n-bit codes is 1.
Claim 16
Dependent Claim
221 words
A data processing apparatus for converting a plurality of m-bit input data into a code row comprising a plurality of n-bit codes where (n>m), each of the n-bit codes corresponding to a different one of said m-bit data, a first bit of each of said n-bit codes being fixed, comprising: input means for inputting the m-bit input data in a binary data sequence; converting means for converting the input m-bit data into n-bit output data, said converting means including: (i) first means for judging accumulated charges of said code row, said code row comprising at least one n-bit code; (ii) second means for judging accumulated charges of a next n-bit code to be connected to said code row; (iii) third means for judging a parity of said code row; (iv) control means for controlling inversion/non-inversion of a first bit of said next n-bit code in response to the judgements made by said first, second, and third means in order to utilize said first bit as a connecting bit; and (v) transmit means for transmitting in parallel (n-1) bits in said next n-bit code, which follow said first bit controlled by said control means in order to connect said (n-1) bits to said code row; and output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 17
Dependent Claim
221 words
A data processing apparatus for converting a plurality of m-bit input data into a code row comprising a plurality of n-bit codes where (n>m), each of the n-bit codes corresponding to a different one of said m-bit data, a first bit of each of said n-bit codes being fixed, comprising: input means for inputting the m-bit input data in a binary data sequence; converting means for converting the input m-bit data into n-bit output data, said converting means including: (i) first means for judging accumulated charges of said code row, said code row comprising at least one n-bit code; (ii) second means for judging accumulated charges of a next n-bit code to be connected to said code row; (iii) third means for judging a parity of said code row; (iv) control means for controlling inversion/non-inversion of a first bit of said next n-bit code in response to the judgements made by said first, second, and third means in order to utilize said first bit as a connecting bit; and (v) transmit means for transmitting in parallel (n-1) bits in said next n-bit code, which follow said first bit controlled by said control means in order to connect said (n-1) bits to said code row; and output means for outputting a sequence of said n-bit codes corresponding to said binary data sequence.
Claim 18
Dependent Claim
55 words
A data processing apparatus according to claim 13, wherein said control means controls inversion/non-inversion of the first bit of said next n-bit code in response to whether the judgements made by said first means and of said second means are coincident with each other and in response to the judgement made by said third means.
Claim 19
Dependent Claim
14 words
A data processing apparatus according to claim 13, wherein said code row is DC-freed.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1992-05-22 | 1992-11-21 | 1993-05-23 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1996-05-22 | 1996-11-21 | 1997-05-23 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2000-05-22 | 2000-11-21 | 2001-05-23 | $7700.00 | Window Closed / Lapsed |