Method and apparatus for recording and/or reproducing a PCM signal with asynchronous operation

Claim 2

Method for recording a digital signal, comprising the steps of: receiving a digital signal consisting of blocks each including a plurality of symbols, the number of symbols of said digital signal included in each block varying according to a predetermined sequence; interleaving said plurality of symbols over the extent of each of said blocks; dividing each of said blocks into a plurality of sub-blocks; and recording said symbols in said plurality of sub-blocks with a plurality of different recording heads at every sub-block, respectively, whereby said symbols of said digital signal may be received asynchronously from said recording of said sub-blocks.

Claim 3

Method according to claim 1, wherein the number of said plurality of different recording heads is two.

Claim 4

Method according to claim 1, wherein the number of said plurality of different recording heads is three.

Claim 5

Method according to claim 1, further comprising the step of generating an error correction code from each series of interleaved symbols in a predetermined direction.

Claim 6

Method according to claim 4, wherein the initial symbol recorded with different recording heads among said symbols in respective series of said error correction code is included in different order of said sub-block recorded with different recording heads.

Claim 7

Method for reproducing a digital signal consisting of blocks each including a plurality of symbols interleaved over the extent of each of said blocks, the number of symbols of said digital signal included in each block varying according to a predetermined sequence, which is divided into a plurality of sub-blocks each recorded on a different track; the method comprising the steps of: reproducing said symbols of said digital signal with a plurality of different reproducing heads at every sub-block, respectively; de-interleaving said plurality of symbols over the extent of each of said blocks; and outputting said de-interleaved symbols, whereby said symbols of said digital signal may be reproduced asynchronously from said reproduction of said sub-blocks.

Claim 8

Method for reproducing a digital signal consisting of blocks each including a plurality of symbols interleaved over the extent of each of said blocks, the number of symbols of said digital signal included in each block varying according to a predetermined sequence, which is divided into a plurality of sub-blocks each recorded on a different track; the method comprising the steps of: reproducing said symbols of said digital signal with a plurality of different reproducing heads at every sub-block, respectively; de-interleaving said plurality of symbols over the extent of each of said blocks; and outputting said de-interleaved symbols, whereby said symbols of said digital signal may be reproduced asynchronously from said reproduction of said sub-blocks.

Claim 9

Method according to claim 6, wherein the number of said plurality of different reproducing head is two.

Claim 10

Method according to claim 6, wherein the number of said plurality of different reproducing heads is three.

Claim 11

Method according to claim 6, wherein each of said series of interleaved symbols includes an error correcting code in a predetermined direction and the method further comprising the step of decoding each error correction code.

Claim 12

Method according to claim 9, wherein each of said sub-blocks includes another error correction code and the method further comprising the step of decoding each of another error correction code.

Claim 13

Method according to claim 10, further comprising the step of detecting which reproducing head causes an error.

Claim 14

Apparatus for recording a digital signal comprising: means for receiving a digital signal consisting of blocks each including a plurality of symbols, the number of symbols of said digital signal included in each lock varying according to a predetermined sequence; memory means for storing said digital signal; address means for interleaving said plurality of symbols over the extent of each of said blocks and for dividing each of said blocks into a plurality sub-blocks; and means for recording said symbols in said plurality of sub-blocks with a plurality of different recording heads at every sub-block, respectively, whereby said symbols of said digital signal may be received asynchronously from said recording of said sub-blocks.

Claim 15

Apparatus for recording a digital signal comprising: means for receiving a digital signal consisting of blocks each including a plurality of symbols, the number of symbols of said digital signal included in each lock varying according to a predetermined sequence; memory means for storing said digital signal; address means for interleaving said plurality of symbols over the extent of each of said blocks and for dividing each of said blocks into a plurality sub-blocks; and means for recording said symbols in said plurality of sub-blocks with a plurality of different recording heads at every sub-block, respectively, whereby said symbols of said digital signal may be received asynchronously from said recording of said sub-blocks.

Claim 16

Apparatus according to claim 12, wherein the number of said plurality of different recording head is two.

Claim 17

Apparatus according to claim 12, wherein the number said plurality of different recording heads is three.

Claim 18

Apparatus according to claim 12, further comprising means for generating an error correction code from each series of interleaved symbols in a predetermined direction.

Claim 19

Apparatus according to claim 15, wherein the initial symbol recorded with different recording heads among said symbols in respective series of said error correction code is included in different order of said sub-blocks recorded with different recording heads.

Claim 20

Apparatus for reproducing digital signal consisting of blocks each including a plurality of symbols interleaved over the extent of each of said blocks, the number of said symbols of said digital signal in each block varying according to a predetermined seqeunce, which is divided into a plurality of sub-blocks each recorded on different tracks; the apparatus comprising; means for reproducing said symbols of said digital signal with a plurality of different reproducing heads at every sub-block, respectively; means for de-interleaving said plurality of symbols over the extent of each of said blocks; and means for outputting said de-interleaved symbols, whereby said de-interleaved symbols of said digital signal may be reproduced asynchronously from said reproduction of said sub-blocks.

Claim 21

Apparatus for reproducing digital signal consisting of blocks each including a plurality of symbols interleaved over the extent of each of said blocks, the number of said symbols of said digital signal in each block varying according to a predetermined seqeunce, which is divided into a plurality of sub-blocks each recorded on different tracks; the apparatus comprising; means for reproducing said symbols of said digital signal with a plurality of different reproducing heads at every sub-block, respectively; means for de-interleaving said plurality of symbols over the extent of each of said blocks; and means for outputting said de-interleaved symbols, whereby said de-interleaved symbols of said digital signal may be reproduced asynchronously from said reproduction of said sub-blocks.

Claim 22

Apparatus according to claim 17, wherein the number of said plurality of different reproducing heads is two.

Claim 23

Apparatus according to claim 17, wherein the number of said plurality of different reproducing heads is three.

Claim 24

Apparatus according to claim 17, wherein each of said series of interleaved symbols includes an error correcting code in a predetermined direction and the apparatus further comprising means for decoding each error correction code.

Claim 25

Apparatus according to claim 20, wherein each of said sub-blocks includes another error correction code and the apparatus further comprising means for decoding each of said another error correction code.

Claim 26

Apparatus according to claim 21, further comprising means for detecting which reproducing head causes an error.

Claim 27

Method for recording a video signal having a predetermined field frequency and a digital signal having a predetermined sampling frequency, comprising the steps of: receiving a digital signal including a plurality of symbols together with said video signal; dividing said video signal into a plurality of units each including a first predetermined number J of fields; dividing said respective units into a second predetermined number K of blocks each including a third predetermined number L (J=KL) of fields; recording said digital signal so that a fourth predetermined number M of said symbols are included in every third predetermined number L of fields of one of said second predetermined number K of blocks and that said fourth predetermined number M of said symbols are included in one of third predetermined number L of fields and a fifth predetermined number N of said symbols are included in the other of third predetermined number L of fields of the other blocks.

Claim 28

Method for recording a video signal having a predetermined field frequency and a digital signal having a predetermined sampling frequency, comprising the steps of: receiving a digital signal including a plurality of symbols together with said video signal; dividing said video signal into a plurality of units each including a first predetermined number J of fields; dividing said respective units into a second predetermined number K of blocks each including a third predetermined number L (J=KL) of fields; recording said digital signal so that a fourth predetermined number M of said symbols are included in every third predetermined number L of fields of one of said second predetermined number K of blocks and that said fourth predetermined number M of said symbols are included in one of third predetermined number L of fields and a fifth predetermined number N of said symbols are included in the other of third predetermined number L of fields of the other blocks.

Claim 29

Method according to claim 23, wherein said first predetermined number J is 200; said second predetermined number K is 50; a third predetermined number L is 4; a fourth predetermined number M is 735; a fifth predetermined number N is 736.