Trigger arrangement suitable for oscillscopes

Claim 2

A trigger arrangement comprising, a series-combination of a first, a second and a third bistable element where the third bistable element has one input coupled to an output of the second bistable element, an input of each bistable element being coupled to a trigger input for a trigger input signal, a release input for a release signal coupled to at least one of the bistable elements, a trigger output for a trigger output signal coupled to an output of said third bistable element, said trigger output and said first, second and third bistable elements having a first stable state when the release signal is at a first value, and said trigger output assumes a second stable state determined by the trigger input signal and after the release signal has assumed a second value, wherein said second state of said trigger output occurs after an output of the first bistable element assumes a second stable state in response to the trigger signal exceeding a first level, whereupon an output of the second bistable element assumes a second stable state after the trigger input signal falls below a second level which is lower than the first level, wherein said third element assumes the second state when the trigger signal exceeds the first level after the output of the second bistable element has assumed the second state.

Claim 3

A trigger arrangement as claimed in claim 1, wherein a first input of the first bistable element is coupled to a first output of a first differential amplifier, a first input of the second bistable element is coupled to a second output of the first differential amplifier and the release input is coupled to a second input of at least one of the first and second bistable elements, the trigger input being coupled to a first input of the first differential amplifier and a second input of the first differential amplifier being coupled to an input terminal for connection of a reference voltage, characterized in that a first input of the third bistable element is coupled to a first output of a second differential amplifier and a second output of the second differential amplifier is coupled to a supply terminal for connection to a direct voltage, and in that the trigger input is coupled to a first input of the second differential amplifier and a second input of the second differential amplifier is coupled to another input terminal for connection of a reference voltage.

Claim 4

A trigger arrangement as claimed in claim 2, characterized in that the release input is coupled to another input of the third bistable element.

Claim 5

An oscilloscope comprising a trigger arrangement as claimed in claim 1

Claim 6

A trigger arrangement as claimed in claim 1, wherein the release input is coupled to another input of the third bistable element.

Claim 7

A trigger arrangement as claimed in claim 1 wherein said one bistable element that is coupled to the release input is the first bistable element in the series-combination.

Claim 8

A three-stage trigger circuit comprising: first, second and third bistable devices connected in cascade with an output of the first bistable device coupled to a first input of the second bistable device and an output of the second bistable device coupled to a first input of the third bistable device, means coupling an output terminal of the trigger circuit to an output of the third bistable device, a release input terminal for a release signal and coupled to at least a first input of the first bistable device, a trigger signal input terminal coupled to a second input of each of said bistable devices, said release signal having a first value at which said bistable devices are in a first stable state, said second and third bistable devices being in a first stable state so long as the first and second bistable devices are in a first stable state, respectively, said second and third bistable devices switching over to a second stable state in synchronism with the trigger signal only after the first and second bistable devices, respectively, have switched to the second stable state, said first bistable device switching from the first stable state to the second stable state in synchronim with the trigger signal provided that the release signal is at a second value, said first, second and third bistable devices being switched to the second bistable state in sequence whereby the trigger circuit output terminal switches from a first level to a second level when the third bistable device switches from the first to the second bistable state.

Claim 9

A three-stage trigger circuit comprising: first, second and third bistable devices connected in cascade with an output of the first bistable device coupled to a first input of the second bistable device and an output of the second bistable device coupled to a first input of the third bistable device, means coupling an output terminal of the trigger circuit to an output of the third bistable device, a release input terminal for a release signal and coupled to at least a first input of the first bistable device, a trigger signal input terminal coupled to a second input of each of said bistable devices, said release signal having a first value at which said bistable devices are in a first stable state, said second and third bistable devices being in a first stable state so long as the first and second bistable devices are in a first stable state, respectively, said second and third bistable devices switching over to a second stable state in synchronism with the trigger signal only after the first and second bistable devices, respectively, have switched to the second stable state, said first bistable device switching from the first stable state to the second stable state in synchronim with the trigger signal provided that the release signal is at a second value, said first, second and third bistable devices being switched to the second bistable state in sequence whereby the trigger circuit output terminal switches from a first level to a second level when the third bistable device switches from the first to the second bistable state.

Claim 10

A trigger circuit as claimed in claim 7 wherein the trigger input terminal is coupled directly to the second input of each of said first and third bistable devices so that first and third bistable devices receive the trigger signal substantially simultaneously.

Claim 11

A trigger circuit as claimed in claim 7 further comprising means for coupling said release input terminal to a further input of said second and third bistable devices.

Claim 12

A trigger circuit as claimed in claim 7 wherein said trigger signal is a periodic signal, said first bistable device being triggered from the first stable state to the second stable state at a first level of the trigger signal and the second bistable device being triggered from the first stable state to the second stable state at a second level of the trigger signal that is different from said first level.

Claim 13

A trigger circuit as claimed in claim 7 wherein the trigger input terminal is coupled directly to the second input of each of said first, second and third bistable devices so that the bistable devices receive the trigger signal substantially simultaneously but are switched from the first to the second bistable state in timed sequence.

Claim 14

A trigger circuit as claimed in claim 7 further comprising first and second differential amplifiers each having first and second inputs and first and second outputs, wherein said trigger input terminal is coupled to the respective second inputs of said bistable devices by coupling said trigger input terminal to the first input of said first and second differential amplifiers and by coupling said first and second outputs of the first differential amplifier to the second input of the first and second bistable devices, respectively, and by coupling a first output of the second differential amplifier to the second input of the third bistable device, and means coupling the second output of the second differential amplifier to a DC supply voltage terminal and the second inputs of the first and second differential amplifiers to a source of reference voltage.

Claim 15

A trigger circuit as claimed in claim 12 wherein each of said bistable devices comprises a logic OR circuit with a feedback resistor and said release input terminal is coupled to respective third inputs of the second and third bistable device.

Claim 16

A trigger circuit as claimed in claim 13 wherein each differential amplifier comprises first and second emitter-coupled transistors with the emitters connected to a current source.

Claim 17

A trigger arrangement as claimed in claim 1 wherein said bistable elements are coupled to the trigger input such that the trigger input signal is applied to said input of each bistable device substantially simultaneously.