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US4881114A Expired / Lapsed US ⏱️ 0.0 years remaining

Selectively formable vertical diode circuit element

Assignee: Microsemi SoC Corp
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Filing: 1986-05-16
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Granted: 1989-11-14
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Expires: 2006-05-16
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Abstract

Abstract A programmable low impedance interconnect diode element is disclosed having a lower electrode formed of a semiconductor material of a first conductivity type covered by an insulating dielectric layer which may be in a preferred embodiment comprised of an initial layer of silicon dioxide, a second layer of silicon nitride and a third layer of silicon dioxide, covered by a layer of semiconductor material of a second conductivity type. A programmable read only memory array and a programmable logic array comprising a plurality of the above-described cells are also disclosed.

Inventors

  • 👤 Amr M. Mohsen
  • 👤 Esmat Z. Hamdy
  • 👤 John L. McCollum

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 02:54
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491; H10W20/01; H10W20/031; H10W20/064; Y; Y10; Y10S; Y10S257/00; Y10S257/91; Y10S257/926

Claims Analysis

Total Claims: 12
Claim 1
Independent Claim 130 words
A selectively formable vertical diode circuit element formed by a process including the steps of: forming a diffusion area of a first conductivity type in a semiconductor substrate of a second conductivity type, forming a first oxide insulating layer over said diffusion area, forming a second silicon nitride insulating layer over said first insulating layer, forming a third oxide insulating layer over said second insulating layer, forming a semiconductor layer of second conductivity type over said insulating layer above at least a portion of said diffusion area, and further a step of applying a voltage source for a controlled time between selected ones of a said diffusion areas and said semiconductor layer, at a voltage sufficient to break down said first, second, and third insulating layers and form a diode.
Claim 2
Dependent Claim 130 words
A selectively formable vertical diode circuit element formed by a process including the steps of: forming a diffusion area of a first conductivity type in a semiconductor substrate of a second conductivity type, forming a first oxide insulating layer over said diffusion area, forming a second silicon nitride insulating layer over said first insulating layer, forming a third oxide insulating layer over said second insulating layer, forming a semiconductor layer of second conductivity type over said insulating layer above at least a portion of said diffusion area, and further a step of applying a voltage source for a controlled time between selected ones of a said diffusion areas and said semiconductor layer, at a voltage sufficient to break down said first, second, and third insulating layers and form a diode.
Claim 3
Dependent Claim 131 words
A plurality of selectively formable vertical diode circuit elements disposed in a semiconductor substrate of a first conductivity type, each of said elements including: a first electrode comprising a first region of semiconductor material of a second conductivity type disposed in said substrate, an insulator covering said first region, said insulator having a first layer of silicon dioxide, a second layer of silicon nitride over said first layer of silicon dioxide, and a third layer of silicon dioxide over said layer of silicon nitride, and, an upper layer of semiconductor material of said first conductivity type over said insulator, at least one of said elements further including a conductive filament in said insulator, said filament extending between and forming a PN junction between said first and second regions of semiconductor material.
Claim 4
Dependent Claim 131 words
A plurality of selectively formable vertical diode circuit elements disposed in a semiconductor substrate of a first conductivity type, each of said elements including: a first electrode comprising a first region of semiconductor material of a second conductivity type disposed in said substrate, an insulator covering said first region, said insulator having a first layer of silicon dioxide, a second layer of silicon nitride over said first layer of silicon dioxide, and a third layer of silicon dioxide over said layer of silicon nitride, and, an upper layer of semiconductor material of said first conductivity type over said insulator, at least one of said elements further including a conductive filament in said insulator, said filament extending between and forming a PN junction between said first and second regions of semiconductor material.
Claim 5
Dependent Claim 26 words
The plurality of selectively formable vertical diode circuit elements of claim 2, wherein said first region is moderately doped and said second region is heavily doped.
Claim 6
Dependent Claim 67 words
The plurality of selectively formable vertical diode circuit elements of claim 2, wherein said first layer in said insulator has a thickness in the range of from approximately 20 Å to 50 Å, second layer in said insulator has a thickness of from approximately 40 Å to 100 Å, and the third layer in said insulator has a thickness of from approximately 0 Å to 50 Å.
Claim 7
Dependent Claim 30 words
The plurality of selectively formable vertical diode circuit elements of claim 4 wherein substrate is N-type material, said first region is P-type material and said upper layer is N-type material.
Claim 8
Dependent Claim 30 words
The plurality of selectively formable vertical diode circuit elements of claim 5 wherein said first region is surfaced doped to the range 1×10 15 to 1×10 17 atoms/cm 3 .
Claim 9
Dependent Claim 20 words
The plurality of selectively formable vertical diode circuit elements of claim 2 wherein said upper layer is heavily doped polysilicon.
Claim 10
Dependent Claim 20 words
The plurality of selectively formable vertical diode circuit elements of claim 5 wherein said upper layer is heavily doped polysilicon.
Claim 11
Dependent Claim 120 words
A plurality of selectively formable vertical diode circuit elements disposed in a semiconductor substrate of a first conductivity type, each of said elements including: a first electrode comprising a first region of semiconductor material of a second conductivity type disposed in said substrate, an insulator covering said first region, said insulator having a first layer of silicon dioxide, a second layer of silicon nitride over said first layer of silicon dioxide, and a third layer of silicon dioxide over said layer of silicon nitride, and, an upper layer of metal over said insulator, at least one of said elements further including a conductive filament in said insulator and forming a Schottky diode contact between said metal and said first region.
Claim 12
Dependent Claim 120 words
A plurality of selectively formable vertical diode circuit elements disposed in a semiconductor substrate of a first conductivity type, each of said elements including: a first electrode comprising a first region of semiconductor material of a second conductivity type disposed in said substrate, an insulator covering said first region, said insulator having a first layer of silicon dioxide, a second layer of silicon nitride over said first layer of silicon dioxide, and a third layer of silicon dioxide over said layer of silicon nitride, and, an upper layer of metal over said insulator, at least one of said elements further including a conductive filament in said insulator and forming a Schottky diode contact between said metal and said first region.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1992-11-13 1993-05-15 1993-11-14 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1996-11-13 1997-05-15 1997-11-14 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2000-11-13 2001-05-15 2001-11-14 $7700.00 Window Closed / Lapsed

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