Claims Analysis
Total Claims: 14
Claim 1
Independent Claim
300 words
A conductivity modulated metal oxide semiconductor field effect transistor, comprising: a first conductivity type region having a first surface; a high resistance semiconductor region of a second conductivity type having a second surface; a second conductivity type region provided between said first conductivity type region and said high resistance semiconductor region and having an impurity concentration higher than that of said high resistance semiconductor region; a base region of the first conductivity type which is formed in the second surface of said high resistance semiconductor region; a source region of the second conductivity type which is formed in said base region; a gate electrode formed at least on a gate insulating film which is formed on a channel region formed in said base region between said high resistance semiconductor region and said source region; a source electrode ohmic-contacting said source and base regions; and a drain electrode formed on said first surface of the first conductivity type region; wherein when a total channel width within a unit area (1 cm 2 ) of an active region is W(μm), an area of said high resistance semiconductor region which is formed beneath said gate electrode and is in direct contact with the gate insulating film within said unit area of the active region is SG(μm 2 ), a perimeter of said base region in contact with the high resistance semiconductor region, i.e., the perimeter of SG, within the 1 cm 2 unit area of the active region, in μm, is T(μm), a channel length is l(μm) and a thickness of said gate insulating film is d(μm), a condition (W·SG)/(T·l·d)<1.46×10 8 is satisfied; and wherein said active region is defined as a region including the base and source regions contacting the source electrode and the high resistance semiconductor region under the gate electrode.
Claim 2
Dependent Claim
300 words
A conductivity modulated metal oxide semiconductor field effect transistor, comprising: a first conductivity type region having a first surface; a high resistance semiconductor region of a second conductivity type having a second surface; a second conductivity type region provided between said first conductivity type region and said high resistance semiconductor region and having an impurity concentration higher than that of said high resistance semiconductor region; a base region of the first conductivity type which is formed in the second surface of said high resistance semiconductor region; a source region of the second conductivity type which is formed in said base region; a gate electrode formed at least on a gate insulating film which is formed on a channel region formed in said base region between said high resistance semiconductor region and said source region; a source electrode ohmic-contacting said source and base regions; and a drain electrode formed on said first surface of the first conductivity type region; wherein when a total channel width within a unit area (1 cm 2 ) of an active region is W(μm), an area of said high resistance semiconductor region which is formed beneath said gate electrode and is in direct contact with the gate insulating film within said unit area of the active region is SG(μm 2 ), a perimeter of said base region in contact with the high resistance semiconductor region, i.e., the perimeter of SG, within the 1 cm 2 unit area of the active region, in μm, is T(μm), a channel length is l(μm) and a thickness of said gate insulating film is d(μm), a condition (W·SG)/(T·l·d)<1.46×10 8 is satisfied; and wherein said active region is defined as a region including the base and source regions contacting the source electrode and the high resistance semiconductor region under the gate electrode.
Claim 3
Dependent Claim
24 words
The transistor according to claim 1, wherein portions of said high resistance semiconductor region are surrounded by said base region to constitute island regions.
Claim 4
Dependent Claim
14 words
The transistor according to claim 3, wherein peripheries of said portions have rectangular shapes.
Claim 5
Dependent Claim
42 words
The transistor according to claim 1, wherein said gate electrode comprises a polycrystalline silicon film and a metal film formed on a portion of said polycrystalline silicon film, said base region of the first conductivity type being formed under said metal film.
Claim 6
Dependent Claim
26 words
The transistor according to claim 1, wherein a lifetime killer is introduced in said high resistance semiconductor region to decrease a saturation current of said transistor.
Claim 7
Dependent Claim
24 words
The transistor according to claim 5, wherein portions of said high resistance semiconductor region are surrounded by said base region to constitute island regions.
Claim 8
Dependent Claim
14 words
The transistor according to claim 6, wherein peripheries of said portions have rectangular shapes.
Claim 9
Dependent Claim
42 words
The transistor according to claim 1, wherein said gate electrode comprises a polycrystalline silicon film and a metal film formed on a portions of said polycrystalline silicon film, said base region of the first conductivity type being formed under said metal film.
Claim 10
Dependent Claim
20 words
The transistor according to claim 5, wherein said channel region comprises a plurality of sections arranged orderly at regular intervals.
Claim 11
Dependent Claim
40 words
The transistor according to claim 9, comprising: a plurality of regions having an impurity concentration higher than that of said plurality of sections of said channel region, one of said plurality of regions being arranged between adjacent of said sections.
Claim 12
Dependent Claim
20 words
The transistor according to claim 1, wherein said channel region comprises a plurality of sections arranged orderly at regular intervals.
Claim 13
Dependent Claim
40 words
The transistor according to claim 11, comprising: a plurality of regions having an impurity concentration higher than that of said plurality of sections of said channel region, one of said plurality of regions being arranged between adjacent of said sections.
Claim 14
Dependent Claim
12 words
The transistor according to claim 1, wherein condition (W·SG)/(T·l·d)<1.1×10 8 is satisfied.