US4916747A
Expired / Lapsed
US
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Image processing system
Assignee: Canon Inc
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Filing: 1988-06-10
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Granted: 1990-04-10
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Expires: 2008-06-10
Abstract
Abstract An image processing system has a line sensor for reading an image, a binarizing circuit for binarizing the read image data, a clock generator for generating a clock for transferring the image data, and a frequency changing circuit for changing the frequency of the clock from the clock generator using a decimal counter (e.g., a DRM) to allow image reproduction of any desired magnification factor without errors.
Inventors
- 👤 Shinobu Arimoto
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 02:34
CPC Classifications
H; H04; H04N; H04N1/00; H04N1/387; H04N1/393; H04N1/3935; H04N1/40; H04N1/40068
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
164 words
An image processing system comprising: image data input means for inputting image data; memory means for storing image data input from said image data input means; clock signal generating means for generating a clock signal which serves as a reference clock signal for writing image data in said memory means; dividing means for dividing a clock signal from said clock signal generating means to produce a divided clock signal corresponding to a magnification factor; and control means for controlling the writing of image data in said memory means in response to the divided clock signal produced by said dividing means, wherein said dividing means comprises a counter for counting up to a number R+1 of clock pulses where R+1 is equal to an integer multiple of ten, and said dividing means divides a clock signal from said clock signal generating means into a divided clock signal having clock pulses of period ##EQU1## where S is a value set in accordance with the magnification factor.
Claim 2
Dependent Claim
164 words
An image processing system comprising: image data input means for inputting image data; memory means for storing image data input from said image data input means; clock signal generating means for generating a clock signal which serves as a reference clock signal for writing image data in said memory means; dividing means for dividing a clock signal from said clock signal generating means to produce a divided clock signal corresponding to a magnification factor; and control means for controlling the writing of image data in said memory means in response to the divided clock signal produced by said dividing means, wherein said dividing means comprises a counter for counting up to a number R+1 of clock pulses where R+1 is equal to an integer multiple of ten, and said dividing means divides a clock signal from said clock signal generating means into a divided clock signal having clock pulses of period ##EQU1## where S is a value set in accordance with the magnification factor.
Claim 3
Dependent Claim
21 words
A system according to claim 1, wherein said image data input means includes means for binarizing data of a read document.
Claim 4
Dependent Claim
21 words
A system according to claim 2, wherein said clock signal is in synchronism with a clock signal from said binarizing means.
Claim 5
Dependent Claim
15 words
A system according to claim 1, wherein said counter comprises a plurality of decimal counters.
Claim 6
Dependent Claim
14 words
A system according to claim 4, wherein S is set in units of percentage.
Claim 7
Dependent Claim
29 words
A system according to claim 1, further comprising means for photoelectrically reading the image, wherein said clock signal is in synchronism with a clock signal from said reading means.
Claim 8
Dependent Claim
26 words
A system according to claim 6, wherein said clock signal has pulses equal in number to an integer multiple of clock pulses of said reading means.
Claim 9
Dependent Claim
15 words
A system according to claim 1, wherein said counter comprises a scale of 200 counter.
Claim 10
Dependent Claim
14 words
A system according to claim 1, wherein S is set in units of percentage.
Claim 11
Dependent Claim
26 words
A system according to claim 1, wherein said image processing means processes the image data by means of said counter to enlarge or reduce the image.
Claim 12
Dependent Claim
34 words
A system according to claim 1, wherein a frequency of a clock signal from said clock signal generating means corresponds to a maximum magnification factor relating to image data written in said memory means.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-04-09 | 1993-10-09 | 1994-04-10 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-04-09 | 1997-10-09 | 1998-04-10 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-04-09 | 2001-10-09 | 2002-04-10 | $7700.00 | Window Closed / Lapsed |