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US4928056A Expired / Lapsed US ⏱️ 0.0 years remaining

Stabilized low dropout voltage regulator circuit

Assignee: National Semiconductor Corp
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Filing: 1988-10-06
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Granted: 1990-05-22
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Expires: 2008-10-06
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Abstract

Abstract A voltage regulator circuit is set forth in which the series pass transistor has its high impedance (collector/drain) electrode connected to the output terminal and a shunt transistor has its low impedance (emitter/source) electrode connected to the output terminal. The circuit is arranged to ensure that the shunt transistor is always conductive so that its low impedance electrode will stabilize the operation of the circuit without requiring any external components. The circuit can be fabricated in either bipolar or CMOS form and a low dropout configuration is employed.

Inventors

  • 👤 Robert A. Pease

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-24 20:01
CPC Classifications
G; G05; G05F; G05F1/00; G05F1/10; G05F1/46; G05F1/618

Claims Analysis

Total Claims: 6
Claim 1
Independent Claim 226 words
A voltage regulator circuit having an unregulated input supply terminal, a regulated output supply terminal and a supply return terminal, said circuit being composed of transistors each one having controlled current flow electrodes of high and low impedance and a current flow control electrode, said circuit comprising: a series pass transistor having its low impedance electrode connected to said unregulated input supply terminal, its high impedance electrode connected to said regulated output supply terminal and a control electrode; means driven from said regulated output supply terminal and connected to said control electrode of said series pass transistor thereby creating an overall negative feedback loop that operates to develop a control potential that holds said regulated output supply terminal at a constant potential level that is substantially independent of temperature, input supply voltage and output supply terminal current; a shunt transistor having its low impedance electrode connected to said regulated supply output terminal, means for returning its high impedance electrode to said supply return terminal and a control electrode; and means, responsive to the current flowing in said shunt transistor, connected to said control electrode of said series pass transistor to form an internal negative feedback loop, within said overall negative feedback loop, said internal negative feedback loop being operative to hold the current flow in said shunt transistor constant and said regulator circuit is thereby stabilized.
Claim 2
Dependent Claim 226 words
A voltage regulator circuit having an unregulated input supply terminal, a regulated output supply terminal and a supply return terminal, said circuit being composed of transistors each one having controlled current flow electrodes of high and low impedance and a current flow control electrode, said circuit comprising: a series pass transistor having its low impedance electrode connected to said unregulated input supply terminal, its high impedance electrode connected to said regulated output supply terminal and a control electrode; means driven from said regulated output supply terminal and connected to said control electrode of said series pass transistor thereby creating an overall negative feedback loop that operates to develop a control potential that holds said regulated output supply terminal at a constant potential level that is substantially independent of temperature, input supply voltage and output supply terminal current; a shunt transistor having its low impedance electrode connected to said regulated supply output terminal, means for returning its high impedance electrode to said supply return terminal and a control electrode; and means, responsive to the current flowing in said shunt transistor, connected to said control electrode of said series pass transistor to form an internal negative feedback loop, within said overall negative feedback loop, said internal negative feedback loop being operative to hold the current flow in said shunt transistor constant and said regulator circuit is thereby stabilized.
Claim 3
Dependent Claim 68 words
The voltage regulator circuit of claim 1 wherein said means for returning said high impedance electrode of said shunt transistor to said supply return terminal comprises: a series resistor coupled between said high impedance electrode of said shunt transistor and said supply return terminal and connected to the input terminals of an operational amplifier having an output terminal connected to said control electrode of said series pass transistor.
Claim 4
Dependent Claim 37 words
The voltage regulator circuit of claim 2 wherein said operational amplifier includes means for developing an input offset potential whereby said offset potential appears across said series resistor and thereby determines the conduction in said shunt transistor.
Claim 5
Dependent Claim 53 words
The voltage regulator circuit of claim 1 wherein said circuit is fabricated using CMOS construction, said series pass transistor is a P channel transistor having its drain connected to said regulated output supply terminal and said shunt transistor is a P channel transistor having its source connected to said regulated output supply terminal.
Claim 6
Dependent Claim 52 words
The voltage regulator circuit of claim 1 wherein said circuit is fabricated using bipolar transistor construction, said series pass transistor is a PNP transistor having its collector connected to said regulated output supply terminal and said shunt transistor is a PNP transistor having its emitter connected to said regulated output supply terminal.

References Cited (Backward Citations)

US4075546A Cited
US4743833A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1993-05-21 1993-11-20 1994-05-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1997-05-21 1997-11-20 1998-05-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2001-05-21 2001-11-20 2002-05-22 $7700.00 Window Closed / Lapsed

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