US4933646A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Field effect transistor limiter circuitry
Assignee: RCA Licensing Corp
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Filing: 1989-03-27
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Granted: 1990-06-12
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Expires: 2009-03-27
Abstract
Abstract An amplifier/limiter circuit includes an amplifier providing an output signal having a potential range between ground and V D volts. A first pair of parallel connected complementary transistors have their principal conduction paths coupled between the output terminal of the amplifier and an amplifier/limiter output terminal. A second pair of parallel connected complementary transistors have their principal conduction paths coupled between the amplifier/limiter output terminal and a point of reference potential having a potential value between V D and ground. The amplifier/limiter output terminal provides a linear, amplified version of signal provided to the amplifier circuit over a limited range of potentials between V D and ground, which range is less than V D .
Inventors
- 👤 Donald J. Sauer
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 09:37
CPC Classifications
H; H03; H03G; H03G11/00; H03G11/002
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
139 words
In combination: a source of relatively positive and relatively negative supply potential; an amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a point of substantially constant reference potential having a value between said relatively positive and relatively negative supply potential, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials.
Claim 2
Dependent Claim
139 words
In combination: a source of relatively positive and relatively negative supply potential; an amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a point of substantially constant reference potential having a value between said relatively positive and relatively negative supply potential, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials.
Claim 3
Dependent Claim
39 words
The combination set forth in claim 1 wherein each pair of transistors comprises a P-type field effect transistor and an N-type field effect transistor having respective gate electrodes coupled to the relatively negative and relatively positive supply potentials, respectively.
Claim 4
Dependent Claim
164 words
In combination: a source of relatively positive and relatively negative supply potential; an amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a circuit node, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; and first resistance means coupled between said relatively positive supply potential and said circuit node, and second resistance means coupled between said circuit node and said relatively negative supply potential for generating a substantially constant reference potential at said circuit node.
Claim 5
Dependent Claim
164 words
In combination: a source of relatively positive and relatively negative supply potential; an amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a circuit node, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; and first resistance means coupled between said relatively positive supply potential and said circuit node, and second resistance means coupled between said circuit node and said relatively negative supply potential for generating a substantially constant reference potential at said circuit node.
Claim 6
Dependent Claim
68 words
The combination set forth in claim 3 wherein said amplifier comprises: a first field effect transistor of a first conductivity type arranged as a common source amplifier; and a second field effect transistor of opposite conductivity type, biased as a current source; and wherein the principal conduction paths of said first and second field effect transistors are serially coupled between said relatively positive and relatively negative supply potentials.
Claim 7
Dependent Claim
190 words
In combination; a source of relatively positive and relatively negative supply potential; a first amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a point of substantially constant reference potential, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a low pass filter; a differential amplifier having inverting and noninverting input terminals and an output terminal; means serially coupling said lowpass filter with said first amplifier between the output terminal and noninverting input terminal of said differential amplifier for providing feedback around said differential amplifier; and means for providing an input signal to the inverting input terminal of said differential amplifier.
Claim 8
Dependent Claim
190 words
In combination; a source of relatively positive and relatively negative supply potential; a first amplifier connected across said relatively positive and relatively negative supply potentials, having an input terminal for applying an input signal and having an output terminal; a first pair of transistors having respective principal conduction paths coupled in parallel between said output terminal of said amplifier and a circuit output terminal, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a second pair of transistors having respective principal conduction paths coupled in parallel between said circuit output terminal and a point of substantially constant reference potential, and having respective control electrodes coupled to at least one of said relatively positive and relatively negative supply potentials; a low pass filter; a differential amplifier having inverting and noninverting input terminals and an output terminal; means serially coupling said lowpass filter with said first amplifier between the output terminal and noninverting input terminal of said differential amplifier for providing feedback around said differential amplifier; and means for providing an input signal to the inverting input terminal of said differential amplifier.
Claim 9
Dependent Claim
24 words
The combination set forth in claim 5 further including a capacitor coupled between the output terminal and inverting input terminal of said differential amplifier.
Claim 10
Dependent Claim
57 words
The combination set forth in claim 6 wherein said means for providing input signal comprises: first and second signal sources; a further capacitor having a first electrode coupled to said inverting input terminal and having a second electrode; and means for alternately coupling said first and second signal sources to the second electrode of said further capacitor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-06-11 | 1993-12-11 | 1994-06-12 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-06-11 | 1997-12-11 | 1998-06-12 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-06-11 | 2001-12-11 | 2002-06-12 | $7700.00 | Window Closed / Lapsed |