US4948990A
Expired / Lapsed
US
⏱️ 0.0 years remaining
BiCMOS inverter circuit
Assignee: Samsung Electronics Co Ltd
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Filing: 1989-01-03
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Granted: 1990-08-14
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Expires: 2009-01-03
Abstract
Abstract A BiCMOS inverter circuit having complementary MOS transistors and complementary bipolar transistors enables a high speed inverting operation as well as high degree of integration when it is fabricated on a semiconductor chip. The inverter circuit may further include another complementary MOS transistors to allow the logic output to be advantageously full switched in the range of V cc -0 V keeping the high speed operation.
Inventors
- 👤 Yun-Seung Shin
- 👤 Sung-Ki Min
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-27 21:46
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/094; H03K19/0944; H03K19/09448; H03K19/01; H03K19/013; H03K19/0136; H10; H10D; H10D1/00; H10D1/60; H10D1/62; H10D1/66
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
246 words
A BICMOS inverter circuit comprising: an input for receiving a high or low signal; a first P type MOS transistor having a gate connected to said input, a source adapted to be connected to the positive terminal of a voltage source, and a drain connected to a signal output node; a first N type MOS transistor having a gate connected to said input, a source adapted to be connected to the negative terminal of said voltage source, and a drain connected to said signal output node; a first bipolar transistor having an emitter, a base connected to said signal output node, and a collector connected to the source of said first P type MOS transistor; a second bipolar transistor having a base connected to the base of said first bipolar transistor, an emitter connected to the emitter of said first bipolar transistor, and a collector connected to the source of said first N type MOS transistor; a second P type MOS transistor having a gate connected to said input, a source connected to the source of said first P type MOS transistor, and a drain connected to the emitter of said first bipolar transistor; a second N type MOS transistor having a gate connected to said input, a source connected to the source of said first N type MOS transistor, and a drain connected to the emitter of said first bipolar transistor; and a logic gate output connected to the emitter of said first bipolar transistor.
Claim 2
Dependent Claim
246 words
A BICMOS inverter circuit comprising: an input for receiving a high or low signal; a first P type MOS transistor having a gate connected to said input, a source adapted to be connected to the positive terminal of a voltage source, and a drain connected to a signal output node; a first N type MOS transistor having a gate connected to said input, a source adapted to be connected to the negative terminal of said voltage source, and a drain connected to said signal output node; a first bipolar transistor having an emitter, a base connected to said signal output node, and a collector connected to the source of said first P type MOS transistor; a second bipolar transistor having a base connected to the base of said first bipolar transistor, an emitter connected to the emitter of said first bipolar transistor, and a collector connected to the source of said first N type MOS transistor; a second P type MOS transistor having a gate connected to said input, a source connected to the source of said first P type MOS transistor, and a drain connected to the emitter of said first bipolar transistor; a second N type MOS transistor having a gate connected to said input, a source connected to the source of said first N type MOS transistor, and a drain connected to the emitter of said first bipolar transistor; and a logic gate output connected to the emitter of said first bipolar transistor.
References Cited (Backward Citations)
US4813020A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-13 | 1994-02-12 | 1994-08-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-13 | 1998-02-12 | 1998-08-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-13 | 2002-02-12 | 2002-08-14 | $7700.00 | Window Closed / Lapsed |