US4950618A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Masking scheme for silicon dioxide mesa formation
Assignee: Texas Instruments Inc
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Filing: 1989-04-14
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Granted: 1990-08-21
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Expires: 2009-04-14
Abstract
Abstract An improved masking stack (63) comprises a pad oxide (58), polysilicon (60) and nitride (62). After forming a photoresist pattern (64) over the stack (63), an anisotropic etch is performed to remove the nitride (62) and a portion of the polysilicon (60) not covered by the pattern (64). Another etch is performed to remove the remaining polysilicon (60) to leave at least a portion of the pad oxide (58). A boron implant (66) is conducted to form implant areas (68 and 70) within the unmasked silicon active device layer (56). A portion of the implant areas (68 and 70) is masked with nitride (72), and the unmasked silicon layer (56) is then etched. The masking stack (63) and the nitride (72) is removed and unprotected silicon layer (56) and implant areas (68 and 70) are covered with an oxide forming the silicon dioxide mesa (78).
Inventors
- 👤 Ravishankar Sundaresan
- 👤 Mishel Matloubian
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 17:27
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/22; H10P76/00; H10P76/40; Y; Y10; Y10S; Y10S148/00; Y10S148/053; Y10S148/082
Claims Analysis
Total Claims: 9
Claim 1
Independent Claim
172 words
A method for forming a semiconductive mesa structure, comprising the steps of: forming a semiconductive layer on an insulating substrate; forming a layer of silicon dioxide on said semiconductive layer; forming a layer of silicon on said silicon dioxide layer; forming a layer of silicon nitride on said layer of silicon; forming a patterned mask on the surface of said layer of silicon nitride; etching the exposed areas of said silicon nitride layer to expose said silicon layer; etching the exposed areas of said silicon layer using an etch selective to silicon over silicon dioxide to expose said silicon dioxide layer; implanting dopant ions into said semiconductive layer using the remaining portions of said silicon layer and said silicon nitride layer as an implantation mask and said silicon dioxide layer serving as a protective coating on said semiconductor layer during said implantation; etching at least part of the exposed portion of said silicon dioxide layer to expose said semiconductive layer; and etching said semiconductive layer to expose portions of said insulating substrate.
Claim 2
Independent Claim
172 words
A method for forming a semiconductive mesa structure, comprising the steps of: forming a semiconductive layer on an insulating substrate; forming a layer of silicon dioxide on said semiconductive layer; forming a layer of silicon on said silicon dioxide layer; forming a layer of silicon nitride on said layer of silicon; forming a patterned mask on the surface of said layer of silicon nitride; etching the exposed areas of said silicon nitride layer to expose said silicon layer; etching the exposed areas of said silicon layer using an etch selective to silicon over silicon dioxide to expose said silicon dioxide layer; implanting dopant ions into said semiconductive layer using the remaining portions of said silicon layer and said silicon nitride layer as an implantation mask and said silicon dioxide layer serving as a protective coating on said semiconductor layer during said implantation; etching at least part of the exposed portion of said silicon dioxide layer to expose said semiconductive layer; and etching said semiconductive layer to expose portions of said insulating substrate.
Claim 3
Dependent Claim
62 words
The method of claim 1 further including the steps of: depositing a masking layer overall after the implantation of said dopant ions into said semiconductive layer; and anisotropically etching said masking layer to provide an etching mask for said etching of said silicon dioxide layer to expose said semiconductive layer and said etching of said semiconductive layer to expose said insulating substrate.
Claim 4
Dependent Claim
12 words
The method of claim 1 wherein said semiconductive layer comprises crystalline silicon.
Claim 5
Dependent Claim
12 words
The method of claim 2 wherein said masking layer comprises silicon nitride.
Claim 6
Dependent Claim
17 words
The method of claim 1 wherein said silicon nitride layer is etched using a fluorine based etchant.
Claim 7
Dependent Claim
22 words
The method of claim 5 wherein said fluorine based etchant is a plasma of C 2 F 6 and CHF 3 .
Claim 8
Dependent Claim
20 words
The method of claim 1 wherein said silicon layer is etched using a plasma of hydrogen chloride and hydrogen bromide.
Claim 9
Dependent Claim
12 words
The method of claim 1 wherein said silicon layer comprises polycrystalline silicon.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-08-20 | 1994-02-19 | 1994-08-21 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-08-20 | 1998-02-19 | 1998-08-21 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-08-20 | 2002-02-19 | 2002-08-21 | $7700.00 | Window Closed / Lapsed |