Semiconductor package

Claim 2

A semiconductor component comprising: a semiconductor chip; a package for housing said semiconductor chip; a signal lead projecting from said package; and a feed lead projecting from said package, said feed lead having a pair of recesses to form two pairs of legs and a first portion not including said recesses disposed between said pairs of legs, wherein at least one of said pairs of legs extends from said package, and wherein said first portion is disposed outside of said package.

Claim 3

The semiconductor package of claim 1, wherein said feed lead is made in the form of a letter "H".

Claim 4

The semiconductor package of claim 1, wherein the width of an end portion of said leg to be mounted on a pad is equal to that of said signal lead.

Claim 5

In a semiconductor package having a substrate upon which is supported a semiconductor chip and a cover physically connected to said substrate, at least one signal lead, means electrically connecting the signal lead to the semiconductor chip, a feed lead, means electrically connecting the feed lead to the semiconductor chip, said feed lead having means defining a pair of recesses that form respective first and second pairs of legs and a wider portion wider than each of said legs and not including said recesses, wherein said first pair of legs is at least partially disposed between said cover and said substrate, and wherein said wider portion is disposed outside of said cover and said substrate.

Claim 6

In a semiconductor package having a substrate upon which is supported a semiconductor chip and a cover physically connected to said substrate, at least one signal lead, means electrically connecting the signal lead to the semiconductor chip, a feed lead, means electrically connecting the feed lead to the semiconductor chip, said feed lead having means defining a pair of recesses that form respective first and second pairs of legs and a wider portion wider than each of said legs and not including said recesses, wherein said first pair of legs is at least partially disposed between said cover and said substrate, and wherein said wider portion is disposed outside of said cover and said substrate.

Claim 7

In a semiconductor package as set forth in claim 4 wherein the pairs of legs extend in opposite direction, one pair for connection to the semiconductor chip and the other pair for mounting on a corresponding pair of pads.

Claim 8

In a semiconductor package as set forth in claim 5 wherein the width of a leg of said one pair is substantially equal to the width of a leg of said other pair.

Claim 9

In a semiconductor package as set forth in claim 5 wherein the width of the leg of said one pair is substantially equal to the width of a signal lead.

Claim 10

In a semiconductor package as set forth in claim 5 wherein the width of the leg of said other pair is substantially equal to the width of a signal lead.

Claim 11

In a semiconductor package as set forth in claim 4 in combination with pads upon which the leads are mounted, said pads for receiving signal leads being of the same width as the pads for receiving each leg of the feed lead.

Claim 12

In a semiconductor package as set forth in claim 4 wherein said feed lead is of H-shape.

Claim 13

In a semiconductor package as set forth in claim 4 wherein the width of an end portion of the leg to be mounted on a pad is equal to that of said signal lead.

Claim 14

The semiconductor package of claim 1, wherein said first portion is disposed between said pairs of legs.

Claim 15

The semiconductor package of claim 1, wherein: said first portion is wider than said signal lead; and said first portion is wider than each of said one of said pairs of legs, whereby said first portion has greater conductivity than said signal lead.

Claim 16

The semiconductor package of claim 13, wherein said first portion is disposed between said pairs of legs.

Claim 17

The semiconductor package of claim 13, wherein the width of the distal end of each of said one of said pairs of legs is substantially equal to a width of said signal lead.

Claim 18

The semiconductor package of claim 15, wherein said first portion is disposed between said pairs of legs.

Claim 19

In a semiconductor package as set forth in claim 4 wherein said wider portion is disposed between said first and second pairs of legs.

Claim 20

In a semiconductor package as set forth in claim 4 wherein said wider portion is wider than said at least one signal lead, whereby said wider portion has greater conductivity than said signal lead.

Claim 21

In a semiconductor package as set forth in claim 18 wherein said wider portion is disposed between said first and second pairs of legs.

Claim 22

In a semiconductor package as set forth in claim 18 wherein a width of each of said first pair of legs is substantially equal to a width of said signal lead.

Claim 23

In a semiconductor package as set forth in claim 20 wherein said wider portion is disposed between said first and second pairs of legs.

Claim 24

In a semiconductor package having a substrate upon which is supported a semiconductor chip, at least one signal lead, means electrically connecting the signal lead to the semiconductor chip, a feed lead, means electrically connecting the feed lead to the semiconductor chip, said feed lead having means defining a pair of recesses that form respective first and second pairs of legs and a wider portion that is wider than each of said legs, in combination with pads disposed on the substrate and upon which the leads are respectively mounted, the legs of said first pair of legs being disposed apart the same distance as the spacing between said pads.

Claim 25

In a semiconductor package having a substrate upon which is supported a semiconductor chip, at least one signal lead, means electrically connecting the signal lead to the semiconductor chip, a feed lead, means electrically connecting the feed lead to the semiconductor chip, said feed lead having means defining a pair of recesses that form respective first and second pairs of legs and a wider portion that is wider than each of said legs, in combination with pads disposed on the substrate and upon which the leads are respectively mounted, the legs of said first pair of legs being disposed apart the same distance as the spacing between said pads.

Claim 26

In a semiconductor package as set forth in claim 22 wherein the pads ar disposed at the edge of the substrate in linear alignment.

Claim 27

In a semiconductor package as set forth in claim 23 wherein said wider portion is wider than each of said legs, wherein said first pair of legs is at least partially disposed between said cover and said substrate, and wherein said wider portion is disposed outside of said cover and said substrate.