Fabrication method for thin film field effect transistor array suitable for liquid crystal display

Claim 1

A method of fabricating a thin film field effect transistor array comprising the steps of: forming a transparent conductive film on a substrate; forming on said substrate a plurality of drain bus lines, a plurality of gate electrodes, and a plurality of pixel electrodes consisting of said transparent conductive film by selectively removing said transparent conductive film using a first photo-mask pattern; forming an insulating film thereafter; forming a first semiconductor thin film on said insulating film; forming an impurity doped second semiconductor thin film on said first semiconductor thin film; forming a plurality of islands consisting of a laminated film of said insulating film, said first semiconductor thin film, and said second semiconductor thin film covering at least each of said plurality of gate electrodes by removing said first semiconductor thin film, said second semiconductor thin film, and said insulating film using a second photo-mask pattern; forming a metal film thereafter; forming a plurality of gate bus lines, a plurality of source electrodes, and a plurality of drain electrodes consisting of said metal film by selectively removing said metal film using a third photo-mask pattern, said gate bus lines being respectively connected to said gate electrodes, said plurality of source electrodes and said plurality of drain electrodes being formed on said second semiconductor thin film on both sides of said plurality of gate electrodes such that one group of said plurality of source electrodes and said plurality of drain electrodes being respectively connected to said plurality of drain bus lines while the other of said plurality of source electrodes and said plurality of drain electrodes being connected to said plurality of pixel electrodes; and removing said second semiconductor thin film existing between each pair of said source electrode and said drain electrode.

Claim 2

A method of fabricating a thin film field effect transistor array comprising the steps of: forming a transparent conductive film on a substrate; forming on said substrate a plurality of drain bus lines, a plurality of gate electrodes, and a plurality of pixel electrodes consisting of said transparent conductive film by selectively removing said transparent conductive film using a first photo-mask pattern; forming an insulating film thereafter; forming a first semiconductor thin film on said insulating film; forming an impurity doped second semiconductor thin film on said first semiconductor thin film; forming a plurality of islands consisting of a laminated film of said insulating film, said first semiconductor thin film, and said second semiconductor thin film covering at least each of said plurality of gate electrodes by removing said first semiconductor thin film, said second semiconductor thin film, and said insulating film using a second photo-mask pattern; forming a metal film thereafter; forming a plurality of gate bus lines, a plurality of source electrodes, and a plurality of drain electrodes consisting of said metal film by selectively removing said metal film using a third photo-mask pattern, said gate bus lines being respectively connected to said gate electrodes, said plurality of source electrodes and said plurality of drain electrodes being formed on said second semiconductor thin film on both sides of said plurality of gate electrodes such that one group of said plurality of source electrodes and said plurality of drain electrodes being respectively connected to said plurality of drain bus lines while the other of said plurality of source electrodes and said plurality of drain electrodes being connected to said plurality of pixel electrodes; and removing said second semiconductor thin film existing between each pair of said source electrode and said drain electrode.

Claim 10

A method of fabricating a thin film field effect transistor array comprising the steps of: forming a transparent conductive film on a substrate; forming a first metal film on said transparent conductive film; forming on said substrate a plurality of drain bus lines, a plurality of gate electrodes, and a plurality of pixel electrodes consisting of a laminated film of said transparent conductive film and said first metal film by selectively removing said transparent conductive film and said first metal film using a first photo-mask pattern; forming an insulating film thereafter; forming a first semiconductor thin film on said insulating film; forming an impurity doped second semiconductor thin film on said first semiconductor thin film; forming a plurality of islands consisting of a laminated film of said insulating film, said first semiconductor thin film, and said second semiconductor thin film covering at least each of said plurality of gate electrodes by removing said first semiconductor thin film, said second semiconductor thin film, and said insulating film using a second photo-mask pattern; forming a second metal film thereafter; forming a plurality of gate bus lines, a plurality of source electrodes, and a plurality of drain electrodes consisting of said second metal film by selectively removing said second metal film and exposing said transparent conductive film constituting said pixel electrodes by selectively removing said first metal film using a third photo-mask pattern, said gate bus lines being respectively connected to said gate electrodes, said plurality of source electrodes and said plurality of drain electrodes being formed on said second semiconductor thin film on both sides of said plurality of gate electrodes such that one group of said plurality of source electrodes and said plurality of drain electrodes being respectively connected to said plurality of drain bus lines while the other of said plurality of source electrodes and said plurality of drain electrodes being connected to said plurality of pixel electrodes; and removing said second semiconductor thin film existing between each pair of said source electrode and said drain electrode.

Claim 11

A method of fabricating a thin film field effect transistor array comprising the steps of: forming a transparent conductive film on a substrate; forming a first metal film on said transparent conductive film; forming on said substrate a plurality of drain bus lines, a plurality of gate electrodes, and a plurality of pixel electrodes consisting of a laminated film of said transparent conductive film and said first metal film by selectively removing said transparent conductive film and said first metal film using a first photo-mask pattern; forming an insulating film thereafter; forming a first semiconductor thin film on said insulating film; forming an impurity doped second semiconductor thin film on said first semiconductor thin film; forming a plurality of islands consisting of a laminated film of said insulating film, said first semiconductor thin film, and said second semiconductor thin film covering at least each of said plurality of gate electrodes by removing said first semiconductor thin film, said second semiconductor thin film, and said insulating film using a second photo-mask pattern; forming a second metal film thereafter; forming a plurality of gate bus lines, a plurality of source electrodes, and a plurality of drain electrodes consisting of said second metal film by selectively removing said second metal film and exposing said transparent conductive film constituting said pixel electrodes by selectively removing said first metal film using a third photo-mask pattern, said gate bus lines being respectively connected to said gate electrodes, said plurality of source electrodes and said plurality of drain electrodes being formed on said second semiconductor thin film on both sides of said plurality of gate electrodes such that one group of said plurality of source electrodes and said plurality of drain electrodes being respectively connected to said plurality of drain bus lines while the other of said plurality of source electrodes and said plurality of drain electrodes being connected to said plurality of pixel electrodes; and removing said second semiconductor thin film existing between each pair of said source electrode and said drain electrode.