US4994802A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Subscriber unit for wireless digital telephone system
Assignee: InterDigital Technology Corp
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Filing: 1988-10-12
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Granted: 1991-02-19
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Expires: 2008-10-12
Abstract
Abstract An analog to digital converter system utilizable in a wireless digital telephone network, the system comprising a circuit to produce an analog signal, and a circuit for amplifying this signal, mixing the amplified signal with a signal from a timing circuit and applying the output of the mixer to a sample and hold circuit; the output of the sample and hold circuit being then applied to an analog to digital converter, the output of which is applied to a FIFO, whose output is then available for further processing.
Inventors
- 👤 David N. Critchlow
- 👤 Graham M. Avis
- 👤 Sandra J. K. Earlam
- 👤 Karle J. Johnson
- 👤 Bruce A. Smetana
- 👤 Gregory L. Westling
- 👤 Eric Paneth
- 👤 Moshe Yehushua
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 21:14
CPC Classifications
H; H04; H04M; H04M11/00; H04M11/06; H04M1/00; H04M1/72; H04M1/725; H04M1/72502; H03; H03D; H03D3/00; H03D3/006; H03D7/00; H03D7/16; H03D7/165; H03H; H03H17/00; H03H17/02; H03H17/06; H03H17/0621; H03H17/0635; H03H17/065; H03H17/0657; H03L; H03L7/00; H03L7/06; H03L7/08; H03L7/085; H03L7/095; H04B; H04B1/00; H04B1/38; H04B1/40; H04B1/50; H04L; H04L27/00; H04L27/10; H04L27/14; H04L27/144; H04L27/152; H04L27/1525; H04L27/18; H04L27/22; H04L27/233; H04L27/2338; H03D2200/00; H03D2200/0041; H03D2200/005; H03D2200/0052; H03D2200/0054; H03D2200/0058; H03D2200/006; H03D2200/0062; H03D2200/0082; H03D3/007; H03D7/161
Claims Analysis
Total Claims: 2
Claim 1
Independent Claim
91 words
An analog to digital converter system comprising: means to produce an analog signal; amplifier means for receiving said analog signal and amplifying the same; a mixer for receiving the amplified analog signal from said amplifier means and combining it with a timing signal received from a timing means; a sample and hold circuit for receiving the combined signal from said mixer and applying its output to an analog to digital converter to form a digital signal; and a FIFO for receiving said digital signal and providing its output for further processing.
Claim 2
Dependent Claim
91 words
An analog to digital converter system comprising: means to produce an analog signal; amplifier means for receiving said analog signal and amplifying the same; a mixer for receiving the amplified analog signal from said amplifier means and combining it with a timing signal received from a timing means; a sample and hold circuit for receiving the combined signal from said mixer and applying its output to an analog to digital converter to form a digital signal; and a FIFO for receiving said digital signal and providing its output for further processing.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-02-18 | 1994-08-20 | 1995-02-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-02-18 | 1998-08-20 | 1999-02-19 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-02-18 | 2002-08-20 | 2003-02-19 | $7700.00 | Window Closed / Lapsed |