US5059554A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for forming polycrystalline silicon contacts
Assignee: STMicroelectronics lnc USA
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Filing: 1989-06-23
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Granted: 1991-10-22
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Expires: 2009-06-23
Abstract
Abstract A method for fabricating integrated circuits is used to improve contacts between polycrystalline interconnect and underlying polycrystalline or monocrystalline silicon regions. After contact openings are formed, a layer of titanium is deposited over the integrated circuit. The titanium is reacted in nitrogen to form a silicide layer only in the openings. Titanium nitride and unreacted titanium are then removed, and a layer of polycrystalline silicon deposited and patterned. The silicide layer between the polycrystalline interconnect and the underlying silicon ensures that a high quality contact is formed.
Inventors
- 👤 Charles R. Spinner
- 👤 Fusen F. Chen
- 👤 Fu-Tai Liou
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 14:21
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0113; Y; Y10; Y10S; Y10S148/00; Y10S148/019; Y10S148/147
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
198 words
A method for forming a shared contact in an integrated circuit, comprising the steps of: forming a thin gate oxide over a silicon substrate; forming a first polycrystalline silicon layer over the gate oxide; forming a first metal silicide layer over the first polycrystalline silicon layer; patterning the gate oxide layer, first polycrystalline silicon layer, and the first metal silicide layer to form a first interconnect layer; forming an active region in the substrate in an area adjacent to a substrate region underlying the first interconnect layer; forming an insulating layer over the surface of the integrated circuit; forming an opening in the insulating layer to expose both a portion of the active region and a portion of the first interconnect layer within the opening; depositing a layer of refractory metal over the surface of the integrated circuit; reacting the refractory metal to form metal silicide regions within the exposed active region portion and on the exposed first interconnect layer portion; removing portions of the metal layer which did not form the silicide regions; forming a second layer of polycrystalline silicon over the integrated circuit; and patterning the second polycrystalline silicon layer to form a second interconnect layer.
Claim 2
Independent Claim
198 words
A method for forming a shared contact in an integrated circuit, comprising the steps of: forming a thin gate oxide over a silicon substrate; forming a first polycrystalline silicon layer over the gate oxide; forming a first metal silicide layer over the first polycrystalline silicon layer; patterning the gate oxide layer, first polycrystalline silicon layer, and the first metal silicide layer to form a first interconnect layer; forming an active region in the substrate in an area adjacent to a substrate region underlying the first interconnect layer; forming an insulating layer over the surface of the integrated circuit; forming an opening in the insulating layer to expose both a portion of the active region and a portion of the first interconnect layer within the opening; depositing a layer of refractory metal over the surface of the integrated circuit; reacting the refractory metal to form metal silicide regions within the exposed active region portion and on the exposed first interconnect layer portion; removing portions of the metal layer which did not form the silicide regions; forming a second layer of polycrystalline silicon over the integrated circuit; and patterning the second polycrystalline silicon layer to form a second interconnect layer.
Claim 3
Dependent Claim
28 words
The method of claim 1, further comprising the step of: prior to said active region forming step, forming insulating sidewalls on vertical sides of the first interconnect layer.
Claim 4
Dependent Claim
28 words
The method of claim 1, wherein the first metal silicide layer is a different metal silicide than that of the metal silicide regions formed in said reacting step.
Claim 5
Dependent Claim
22 words
The method of claim 3, wherein the first metal silicide layer is tantalum disilicide, and the metal silicide regions are titanium disilicide.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-10-21 | 1995-04-22 | 1995-10-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-10-21 | 1999-04-22 | 1999-10-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-10-21 | 2003-04-22 | 2003-10-22 | $7700.00 | Window Closed / Lapsed |