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US5087958A Expired / Lapsed US ⏱️ 0.0 years remaining

Misalignment tolerant antifuse

Assignee: Microsemi SoC Corp
•
Filing: 1990-11-05
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Granted: 1992-02-11
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Expires: 2010-11-05
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Abstract

Abstract A misalignment tolerant antifuse includes a lower electrode, bounded by a relatively thick first insulating layer, an upper electrode separated from the lower electrode by a second insulating layer having a thickness less than that of the first insulating layer, a pair of antifuse window regions in the second insulating layer, abutting the first insulating layer on opposite sides of the lower electrode, the insulating material in the window regions being thinner than the remainder of the second insulating layer, and an upper electrode disposed above the second insulating layer and lying over the pair of regions and at least a portion of the first insulating layer.

Inventors

  • 👤 Shih-Oh Chen
  • 👤 Steve S. Chiang
  • 👤 Gregory W. Bakker

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-28 01:36
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/491

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 93 words
An antifuse including: a lower electrode having first and second opposing sides, a dielectric layer on the surface of said lower electrode, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode disposed above said dielectric layer and lying over said pair of regions.
Claim 2
Dependent Claim 93 words
An antifuse including: a lower electrode having first and second opposing sides, a dielectric layer on the surface of said lower electrode, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode disposed above said dielectric layer and lying over said pair of regions.
Claim 3
Dependent Claim 125 words
An antifuse including: a lower electrode Comprising a doped region in a semiconductor substrate, said lower electrode having first and second opposing sides, said lower electrode bounded on at least said first and second opposing sides by field oxide regions, a dielectric layer disposed on the surface of said semiconductor substrate, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode disposed on the surface of said dielectric layer and lying over said pair of regions.
Claim 4
Dependent Claim 125 words
An antifuse including: a lower electrode Comprising a doped region in a semiconductor substrate, said lower electrode having first and second opposing sides, said lower electrode bounded on at least said first and second opposing sides by field oxide regions, a dielectric layer disposed on the surface of said semiconductor substrate, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode disposed on the surface of said dielectric layer and lying over said pair of regions.
Claim 5
Dependent Claim 13 words
The antifuse of claim 2 wherein said upper electrode is formed from polysilicon.
Claim 6
Dependent Claim 11 words
The antifuse of claim 3 wherein said polysilicon is heavily doped.
Claim 7
Dependent Claim 14 words
The antifuse of claim 2 wherein said upper electrode is formed from a metal.
Claim 8
Dependent Claim 14 words
The antifuse of claim 2 wherein said dielectric layer is formed from silicon dioxide.
Claim 9
Dependent Claim 14 words
The antifuse of claim 2 wherein said dielectric layer is formed from silicon nitride.
Claim 10
Dependent Claim 23 words
The antifuse of claim 2 wherein said dielectric layer includes a first layer of silicon dioxide and a second layer of silicon nitride.
Claim 11
Dependent Claim 23 words
The antifuse of claim 2 wherein said dielectric layer includes a first layer of silicon nitride and a second layer of silicon dioxide.
Claim 12
Dependent Claim 24 words
The antifuse of claim 8, further including a third layer of silicon dioxide over said second layer of silicon nitride in said dielectric layer.
Claim 13
Dependent Claim 120 words
An antifuse including: a lower electrode comprising a layer of conductive material disposed above and insulated from a semiconductor substrate, said lower electrode having first and second opposing sides, a dielectric layer disposed on the surface of said lower electrode, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode comprising a layer of conductive material disposed on the surface of said dielectric layer and lying over said pair of regions.
Claim 14
Dependent Claim 120 words
An antifuse including: a lower electrode comprising a layer of conductive material disposed above and insulated from a semiconductor substrate, said lower electrode having first and second opposing sides, a dielectric layer disposed on the surface of said lower electrode, a pair of regions in said dielectric layer, one each of said pair of regions abutting said first and second opposing sides of said lower electrode, said regions having a thickness less than the thickness of the remainder of said dielectric layer, said regions having a total area of less than about 0.7 μm 2 , an upper electrode comprising a layer of conductive material disposed on the surface of said dielectric layer and lying over said pair of regions.
Claim 15
Dependent Claim 15 words
The antifuse of claim 11 wherein said lower and upper electrodes are formed from polysilicon.
Claim 16
Dependent Claim 22 words
The antifuse of claim 11 wherein said lower electrode is formed from polysilicon and said upper electrode is formed from a metal.
Claim 17
Dependent Claim 16 words
The antifuse of claim 11 wherein said lower and upper electrodes are formed from a metal.
Claim 18
Dependent Claim 14 words
The antifuse of claim 11 wherein said dielectric layer is formed from silicon dioxide.
Claim 19
Dependent Claim 14 words
The antifuse of claim 11 wherein said dielectric layer is formed from silicon nitride.
Claim 20
Dependent Claim 23 words
The antifuse of claim 11 wherein said dielectric layer includes a first layer of silicon dioxide and a second layer of silicon nitride.
Claim 21
Dependent Claim 23 words
The antifuse of claim 11 wherein said dielectric layer includes a first layer of silicon nitride and a second layer of silicon dioxide.
Claim 22
Dependent Claim 24 words
The antifuse of claim 17, further including a third layer of silicon dioxide over said second layer of silicon nitride in said dielectric layer.

References Cited (Backward Citations)

US4899205A Cited
US5019532A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-02-10 1995-08-12 1996-02-11 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-02-10 1999-08-12 2000-02-11 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-02-10 2003-08-12 2004-02-11 $7700.00 Window Closed / Lapsed

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