Method of manufacturing a semiconductor device by mega-electron volt ion implantation

Claim 1

A method of manufacturing a semiconductor device, comprising the steps of: forming desired semiconductor elements, including device active regions and interconnections in a major surface region of a semiconductor substrate, including heat treatments at a temperature higher than 600° C., said substrate containing contaminant elements; ion-implanting a selected element into the semiconductor substrate in which said semiconductor elements have been formed, from the major surface thereof, thereby forming an ion-implanted layer by the implanted ions located at a position close to and deeper than a depletion layer formed in the semiconductor substrate when a predetermined operating voltage is applied to the semiconductor device; and performing a heat treatment at a temperature in the range of about 300° to 600° C., causing said ion-implanted layer to getter said contaminant elements.

Claim 2

A method of manufacturing a semiconductor device, comprising the steps of: forming desired semiconductor elements, including device active regions and interconnections in a major surface region of a semiconductor substrate, including heat treatments at a temperature higher than 600° C., said substrate containing contaminant elements; ion-implanting a selected element into the semiconductor substrate in which said semiconductor elements have been formed, from the major surface thereof, thereby forming an ion-implanted layer by the implanted ions located at a position close to and deeper than a depletion layer formed in the semiconductor substrate when a predetermined operating voltage is applied to the semiconductor device; and performing a heat treatment at a temperature in the range of about 300° to 600° C., causing said ion-implanted layer to getter said contaminant elements.

Claim 9

A method of simultaneously forming a p-type semiconductor region and a gettering site, comprising the steps of: selectively ion-implanting a p-conductivity imparting impurity into a semiconductor substrate such that said implanted ion region has a concentration distribution of said impurity from the surface into the substrate, said substrate containing contaminant elements, and said concentration distribution having a peak value of said impurity at a predetermined depth into said substrate, thereby forming a gettering site by the implanted ions in the vicinity of the peak value, and a p-type device active region comprising an implanted ion portion positioned shallower than said gettering site; and performing a heat treatment on said semiconductor substrate in which said gettering site is formed, at a predetermined temperature, causing said gettering site to getter contaminant elements.

Claim 10

A method of simultaneously forming a p-type semiconductor region and a gettering site, comprising the steps of: selectively ion-implanting a p-conductivity imparting impurity into a semiconductor substrate such that said implanted ion region has a concentration distribution of said impurity from the surface into the substrate, said substrate containing contaminant elements, and said concentration distribution having a peak value of said impurity at a predetermined depth into said substrate, thereby forming a gettering site by the implanted ions in the vicinity of the peak value, and a p-type device active region comprising an implanted ion portion positioned shallower than said gettering site; and performing a heat treatment on said semiconductor substrate in which said gettering site is formed, at a predetermined temperature, causing said gettering site to getter contaminant elements.