Process for forming a contact structure

Claim 2

A process for forming a contact in a multi-layer semiconductor device, comprising the steps of: depositing an imagable material directly on a substrate material, the imagable material having the ability to be etched selectively to the substrate material; lithographically patterning the imagable material to form a sacrificial structure on a first portion of the substrate material while leaving a second portion of the substrate material exposed; forming an insulating layer overlying the second portion of the substrate material and exposing a portion of the sacrificial structure; removing the sacrificial structure to expose the first portion of the substrate material while keeping the insulating layer and substrate material substantially unaltered; and forming a contact of a conductive material to the exposed first portion of the substrate material.

Claim 3

The process of claim 1 wherein the step of depositing an imagable material directly on a substrate material comprises depositing an imagable material directly on a silicon substrate.

Claim 4

The process of claim 2 wherein the step of depositing an imagable material comprises depositing a photoresist material.

Claim 5

The process of claim 1 wherein the step of forming a contact of a conductive material comprises depositing a conductive layer on the device and patterning the conductive layer to form a contact to the exposed first portion of the substrate material.

Claim 6

The process of claim 1 wherein the step of forming an insulating layer comprises forming an insulating layer having a planar upper surface.

Claim 7

The process of claim 5 wherein the step of forming an insulating layer comprises depositing an ECR glass.

Claim 8

The process of claim 1 wherein the step of forming an insulating layer comprises depositing an insulating layer overlying the substrate material and etching the insulating layer to expose a portion of the sacrificial structure.

Claim 9

The process of claim 7 wherein the step of depositing an insulating layer comprises depositing SOG.

Claim 10

The process of claim 1 further comprising the step of etching the contact to further planarize the semiconductor device, while leaving the underlying insulating layer substantially unaltered.

Claim 11

A process for forming a contact in a multi-layer semiconductor device, comprising the steps of: providing a substrate material; forming two spaced apart conductive members overlying the substrate material; providing a first insulating layer on selected surfaces of the spaced apart conductive members; depositing an imagable material overlying the conductive members and the first insulating layer, and directly on a portion of the substrate material located between the two conductive members, the imagable material having the ability to be etched selectively to the first insulating layer and to the substrate material; lithographically patterning the imagable material to form a sacrificial plug between the two spaced apart conductive members which is in direct contact with the portion of the substrate material; forming a second insulating layer overlying the substrate material and exposing a portion of the sacrificial plug; selectively etching the device to remove the sacrificial plug while keeping the first and second insulating layers substantially unaltered, thereby exposing the portion of the substrate material; depositing a conductive layer on the device; and patterning the conductive layer to form a contact to the exposed portion of the substrate material.

Claim 12

A process for forming a contact in a multi-layer semiconductor device, comprising the steps of: providing a substrate material; forming two spaced apart conductive members overlying the substrate material; providing a first insulating layer on selected surfaces of the spaced apart conductive members; depositing an imagable material overlying the conductive members and the first insulating layer, and directly on a portion of the substrate material located between the two conductive members, the imagable material having the ability to be etched selectively to the first insulating layer and to the substrate material; lithographically patterning the imagable material to form a sacrificial plug between the two spaced apart conductive members which is in direct contact with the portion of the substrate material; forming a second insulating layer overlying the substrate material and exposing a portion of the sacrificial plug; selectively etching the device to remove the sacrificial plug while keeping the first and second insulating layers substantially unaltered, thereby exposing the portion of the substrate material; depositing a conductive layer on the device; and patterning the conductive layer to form a contact to the exposed portion of the substrate material.

Claim 13

The process of claim 10 wherein the step of forming a second insulating layer comprises forming a insulating layer having a substantially planar surface.

Claim 14

The process of claim 11 wherein the step of forming a second insulating layer overlying the substrate material comprises depositing SOG.

Claim 15

The process of claim 11 wherein the step of forming a second insulating layer overlying the substrate material comprises depositing an ECR glass.

Claim 16

The process of claim 10 wherein the step of depositing an imagable material comprises depositing a resist material.

Claim 17

The process of claim 10 wherein the steps of depositing an imagable material, patterning the imagable material, depositing an insulating layer, and selectively etching the device to remove the sacrificial plug are each performed at a temperature which is less than 250° C.

Claim 18

The process of claim 10 wherein the step of providing a substrate material comprises providing a silicon substrate material and the step of forming two spaced apart conductive members comprises forming two spaced apart conductive members of polysilicon.

Claim 19

A process for forming a contact in a multi-layer semiconductor device, comprising the steps of: providing a substrate material; providing spaced apart conductors overlying the substrate material; forming an insulating layer overlying the spaced apart conductors; forming a sacrificial plug overlying the insulating layer and in direct contact with a portion of the substrate material positioned between the spaced apart conductors, the sacrificial plug being of a material which has the ability to be etched selectively to the insulating layer and to the substrate material; forming a layer of material having a substantially planar upper surface overlying the substrate material and exposing the sacrificial plug; removing the sacrificial plug, thereby exposing the portion of the substrate material positioned between the spaced apart, conductors and forming an opening between the spaced apart conductors; depositing a conductive layer overlying the substrate material and extending into the opening; and patterning the conductive layer to form a contact to the exposed portion of the substrate material.

Claim 20

A process for forming a contact in a multi-layer semiconductor device, comprising the steps of: providing a substrate material; providing spaced apart conductors overlying the substrate material; forming an insulating layer overlying the spaced apart conductors; forming a sacrificial plug overlying the insulating layer and in direct contact with a portion of the substrate material positioned between the spaced apart conductors, the sacrificial plug being of a material which has the ability to be etched selectively to the insulating layer and to the substrate material; forming a layer of material having a substantially planar upper surface overlying the substrate material and exposing the sacrificial plug; removing the sacrificial plug, thereby exposing the portion of the substrate material positioned between the spaced apart, conductors and forming an opening between the spaced apart conductors; depositing a conductive layer overlying the substrate material and extending into the opening; and patterning the conductive layer to form a contact to the exposed portion of the substrate material.

Claim 21

The process of claim 17 wherein the step of providing a substrate material comprises providing a semiconductor substrate material.

Claim 22

The process of claim 17 wherein the step of forming an insulating layer overlying the spaced apart conductors comprises forming an insulating layer on selected surfaces of the spaced apart conductors.

Claim 23

The process of claim 17 wherein the step of forming a layer of material having a planarized upper surface comprises depositing a layer of material overlying the substrate material and etching the layer of material to substantially planarize an upper surface of the layer of material and to the expose the sacrificial plug.

Claim 24

The process of claim 20 wherein the step of depositing a layer of material comprises depositing an insulating layer.